CS5530

DS742F2

19

2.3.10 Configuration Register Description

PSS (Power Save Select)[31]

0

Standby Mode (Oscillator active, allows quick power-up).

1

Sleep Mode (Oscillator inactive).

PDW (Power Down Mode)[30]

0

Normal Mode

1

Activate the power save select mode.

RS (Reset System)[29]

0

Normal Operation.

1

Activate a Reset cycle. See System Reset Sequence in the datasheet text.

RV (Reset Valid)[28]

0

Normal Operation

1

System was reset. This bit is read only. Bit is cleared to logic zero after the configuration register is read.

IS (Input Short)[27]

0

Normal Input

1

All signal input pairs for each channel are disconnected from the pins and shorted internally.

NU (Not Used)[26]

0

Must always be logic 0. Reserved for future upgrades.

VRS (Voltage Reference Select)[25]

0

11 V

A1-A0 (Output Latch bits)[24:23]

The latch bits (A1 and A0) will be set to the logic state of these bits when the Configuration register is written.

Note that these logic outputs are powered from VA+ and VA-.

00

A1 = 0, A0 = 0

01

A1 = 0, A0 = 1

10

A1 = 1, A0 = 0

11

A1 = 1, A0 = 1

NU (Not Used)[22:20]

0

Must always be logic 0. Reserved for future upgrades.

Filter Rate Select, FRS[19]

0

Use the default output word rates.

1

Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.

NU (Not Used)[18:15]

0

Must always be logic 0. Reserved for future upgrades.

D31(MSB)

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

PSS

PDW

RS

RV

IS

NU

VRS

A1

A0

NU

NU

NU

FRS

NU

NU

NU

D15

D14

D13

D12

D11

D10

D9

D8

D7D6

D5

D4D3D2D1D0

NU

WR3

WR2

WR1

WR0 UP/BP

OCD

NUNUNUNUNUNUNUNUNU