CS8422 datasheet(53/82 Pages) CIRRUS

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DS692PP2

CS8422

00 - Sample Rate Converter

01 - AES3 Receiver Output

10 - SDIN (SDIN and SDOUT should be synchronous)

11 - Reserved

SDOUT2[1:0] - Controls the data source for SDOUT2

00 - Sample Rate Converter

01 - AES3 Receiver Output

10 - SDIN (SDIN and SDOUT should be synchronous)

11 - Reserved

MUTESAO1 - Mute control for the serial audio output port 1

0 - SDOUT1 not muted

1 - SDOUT1 muted (set to all zeros)

MUTESAO2 - Mute control for the serial audio output port 2

0 - SDOUT2 not muted.

1 - SDOUT2 muted (set to all zeros).

SRCD - Controls the data source of the sample rate converter

0 - Serial Audio Input Port (SDIN)

1 - AES3 Receiver Output

11.11 Serial Audio Input Data Format (0Bh)

SIMS - Master/Slave Mode Selector

0 - Serial audio input port is in slave mode. ISCLK and ILRCK are inputs.

1 - Serial audio input port is in master mode. ISCLK and ILRCK are outputs.

SISF - ISCLK Frequency. Valid only in master mode (SIMS = 1). Should be changed when PDN = 1. See

Table 8 for details.

7654

321

SIMS

SISF

SIFSEL2

SIFSEL1

SIFSEL0

Reserved

0000

SAI_CLK[3:0]

MCLK/ILRCK Ratio

ISCLK/ILRCK Ratio

SISF = 0

SISF = 1

0000

INVALID

0001

0010

128

0011

192

0100

256

128

Table 8. ISCLK/ILRCK Ratios and SISF Settings

CS8422 Datasheet(PDF) 53 Page - Cirrus Logic

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