| Electronic Components Datasheet Search |
|
AD7985 Datasheet(PDF) 21 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD7985 Datasheet(HTML) 21 Page - Analog Devices |
|
21 / 28 page ![]() AD7985 Rev. 0 | Page 21 of 28 CS MODE, 4-WIRE WITHOUT BUSY INDICATOR This mode is usually used when multiple AD7985 devices are connected to an SPI-compatible digital host. A connection dia- gram example using two AD7985 devices is shown in Figure 30, and the corresponding timing is given in Figure 31. With SDI high, a rising edge on CNV initiates a conversion, selects CS mode, and forces SDO to high impedance. In this mode, CNV must be held high during the conversion phase and the subsequent data readback. (If SDI and CNV are low, SDO is driven low.) Prior to the minimum conversion time, SDI can be used to select other SPI devices, such as analog multi- plexers, but SDI must be returned high before the minimum conversion time elapses and then held high for the maximum possible conversion time to avoid the generation of the busy signal indicator. When the conversion is complete, the AD7985 enters the acquisition phase and powers down. Each ADC result can be read by bringing its SDI input low, which consequently outputs the MSB onto SDO. The remaining data bits are then clocked by subsequent SCK falling edges. The data is valid on both SCK edges. Although the rising edge can be used to capture the data, a digital host using the SCK falling edge allows a faster reading rate, provided that it has an acceptable hold time. After the 16th SCK falling edge, SDO returns to high impedance and another AD7985 can be read. AD7985 SDI SDO CNV SCK CONVERT DATA IN CLK DIGITAL HOST CS1 CS2 AD7985 SDI SDO CNV SCK Figure 30. CS Mode, 4-Wire Without Busy Indicator Connection Diagram ACQUISITION (n) ACQUISITION (n – 1) ACQUISITION (n + 1) 1 2 BEGIN DATA (n – 1) CONVERSION (n) END DATA (n – 1) SCK CNV SDO 14 15 CONVERSION (n – 1) END DATA (n – 2) tCONV tDATA 0 (I/O QUIET TIME) (I/O QUIET TIME) 16 14 15 16 115 14 13 2 0 1 2 SDI (I/O QUIET TIME) tCYC tACQ tQUIET tSCK tDIS tDIS tHSDO tHSDICNV tSSDICNV tEN tEN tDSDO tHSDO tDATA tCONV Figure 31. CS Mode, 4-Wire Without Busy Indicator Serial Interface Timing |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |