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XRT86VL3X Datasheet(PDF) 27 Page - Exar Corporation |
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XRT86VL3X Datasheet(HTML) 27 Page - Exar Corporation |
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27 / 154 page ![]() XRT86VL3X 20 REV. 1.2.3 T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION 3.0 HDLC CONTROLLERS AND LAPD MESSAGES The purpose of the HDLC controllers is to allow messages to be stored for transport in the outbound transmit framer block or extracted from the receive framer block through the LAPD interface. Each channel within the Framer has 3 independent HDLC controllers. Each HDLC controller has two 96-Byte buffers for Transmit and two 96-Byte buffers for Receive. The buffers are used to insert messages into the out going data stream for Transmit or to extract messages from the incoming data stream from the Receive path. Total, there are twelve 96-Byte buffers per channel. This allows multiple HDLC messages to be transported to and from EXAR’s framing device. FIGURE 28. HDLC CONTROLLERS Buffer 0 Buffer 1 Transmit Receive 96-Bytes 96-Bytes 96-Bytes 96-Bytes Transmit Receive 96-Bytes 96-Bytes 96-Bytes 96-Bytes Transmit Receive 96-Bytes 96-Bytes 96-Bytes 96-Bytes HDLC1 HDLC2 HDLC3 Buffer 0 Buffer 1 Buffer 0 Buffer 1 Channel N |
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