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SP506 Datasheet(PDF) 17 Page - Exar Corporation |
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SP506 Datasheet(HTML) 17 Page - Exar Corporation |
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17 / 21 page  17 SP506_100_081208 SP506 Multi–Mode Serial Transceiver © Copyright 2008 Exar Corporation Pin 7 — SCTEN — Enables SCT receiver; active high; TTL input. Pin 8 — LATCH — Latch control for decoder bits (pins 9-12), active low. Logic high input will make decoder transparent. Pins 12–9 — DEC 0 – DEC3 — Transmitter and receiver decode register; configures transmitter and receiver modes; TTL inputs. Pin 18 — RLEN — Enables RL driver; active low; TTL input. Pin 23 — STEN — Enables ST driver; active low; TTL input. POWER SUPPLIES Pins 25, 33, 41, 48, 55, 62, 73, 74 — V CC — +5V input. Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 — GND — Ground. Pin 27 — V DD +10V Charge Pump Capacitor — Connects from V DD to VCC. Suggested capacitor size is 22µF, 16V. Pin 32 — V SS –10V Charge Pump Capacitor — Connects from ground to V SS. Suggested capacitor size is 22µF, 16V. Pins 26 and 30 — C 1 + and C 1 – — Charge Pump Capacitor — Connects from C 1 + to C 1 – . Suggested capacitor size is 22µF, 16V. Pins 28 and 31 — C 2 + and C 2 – — Charge Pump Capacitor — Connects from C 2 + to C 2 – . Suggested capacitor size is 22µF, 16V. Pin 45 — RL(b) — Remote Loopback; analog output, non-inverted; sourced from RL. Pin 47 — RL(a) — Remote Loopback; analog output inverted; sourced from RL. Pin 49— LL(b) — Local Loopback; analog output, non-inverted; sourced from LL. Pin 51 — LL(a) — Local Loopback; analog output, inverted; sourced from LL. Pin 52 — RS(b) — Ready To Send; analog output, non-inverted; sourced from RTS. Pin 54 — RS(a) — Ready To Send; analog output, inverted; sourced from RTS. Pin 56 — TR(b) — Terminal Ready; analog output, non-inverted; sourced from DTR. Pin 58 — TR(a) — Terminal Ready; analog output, inverted; sourced from DTR. Pin 66 — CS(a)— Clear To Send; analog input, inverted; source for CTS. Pin 67 — CS(b)— Clear To Send; analog input, non-inverted; source for CTS. Pin 68 — DM(a)— Data Mode; analog input, inverted; source for DSR. Pin 69 — DM(b)— Data Mode; analog input, non-inverted; source for DSR Pin 78 — DSR— Data Set Ready; TTL output; sourced from DM(a), DM(b) inputs. Pin 80 — CTS— Clear To Send; TTL output; sourced from CS(a) and CS(b) inputs. CONTROL REGISTERS Pins 2 — SDEN — Enables TxD driver, active low; TTL input. Pins 3 — TREN — Enables DTR driver, active low; TTL input. Pins 4 — RSEN — Enables RTS driver, active low; TTL input. Pins 5 — LLEN — Enables LL driver, active low; TTL input. Pin 6 — TTEN — Enables TT driver, active low; TTL input. |
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