STM8L151C4 datasheet(16/101 Pages) STMICROELECTRONICS

16 / 101 page

Functional overview

STM8L151xx, STM8L152xx

16/101

Doc ID 15962 Rev 2

When entering Halt or Active-halt modes, the system automatically switches from the MVR

to the LPVR in order to reduce current consumption.

3.4

Clock management

The clock controller distributes the system clock (SYSCLK) coming from different oscillators

to the core and the peripherals. It also manages clock gating for low power modes and

ensures clock robustness.

Features

●

Clock prescaler: to get the best compromise between speed and current consumption

the clock frequency to the CPU and peripherals can be adjusted by a programmable

prescaler

●

Safe clock switching: Clock sources can be changed safely on the fly in run mode

through a configuration register.

●

Clock management: To reduce power consumption, the clock controller can stop the

clock to the core, individual peripherals or memory.

●

System clock sources: 4 different clock sources can be used to drive the system

clock:

–

1-16 MHz High speed external crystal (HSE)

–

16 MHz High speed internal RC oscillator (HSI)

–

32.768 Low speed external crystal (LSE)

–

38 kHz Low speed internal RC (LSI)

●

RTC and LCD clock sources: the above four sources can be chosen to clock the RTC

and the LCD, whatever the system clock.

●

Startup clock: After reset, the microcontroller restarts by default with an internal

2 MHz clock (HSI/8). The prescaler ratio and clock source can be changed by the

application program as soon as the code execution starts.

●

Clock security system (CSS): This feature can be enabled by software. If a HSE clock

failure occurs, the system clock is automatically switched to HSI.

●

Configurable main clock output (CCO): This outputs an external clock for use by the

application.

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