PCF2119RUSLASH2SLASHF2 datasheet(27/79 Pages) NXP

27 / 79 page

PCF2119X_5

Product data sheet

Rev. 05 — 13 August 2009

27 of 79

NXP Semiconductors

PCF2119x

LCD controllers/drivers

10.2.1 Basic instructions (bit H = 0 or 1)

10.2.1.1

Function_set

[1]

When 4-bit width is selected, data is transmitted in two cycles using the parallel-bus. In a 4-bit application

ports DB3 to DB0 should be left open-circuit (internal pull-ups).

[2]

Default value after power-on in I2C-bus mode.

[3]

No impact if SL = 1.

[4]

Due to the internal pull-ups on DB3 to DB0 in a 4-bit application, the ﬁrst Function_set after power-on sets

bits M, SL and H to logic 1. A second Function_set must be sent to set bits M, SL and H to the required

values.

[5]

Independent of bit M and bit L of the Screen_conf instruction (see Section 10.2.3.1). Only row 1 to row 8

and row 17 are used. All other rows must be left open-circuit. The DDRAM map is the same as in the 2

× 16

character display mode, however, the second line cannot be displayed.

10.2.1.2

BF_AC instructions

[1]

It is recommended that the BF status is checked before the next write operation is started.

Table 12.

Function_set bit description

Bit

Symbol

Value

Description

see Table 10

R/W-

7 to 5

001

ﬁxed value

4DL

interface data length (for parallel mode only)

[1]

× 4 bits (DB7 to DB4)

[2]

8 bits (DB7 to DB0)

unused

[3] number of display lines

1 line

× 32 characters

[4]

2 line

× 16 characters

1SL

multiplex mode

1:18 multiplex drive mode, 1

× 32 or 2 × 16

character display

[4][5]

1:9 multiplex drive mode, 1

× 16 character display

instruction set control

basic instruction set plus standard instruction set

[4]

basic instruction set plus extended instruction set

Table 13.

BF_AC bit

Bit

Symbol

Value

Description

see Table 10

R/W-

7BF

[1] read busy ﬂag

next instruction will be executed

internal operation is in progress;

next instruction will not be executed until BF = 0

6 to 0

0000000 to

1111111

read address counter

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