PCF2119RUSLASH2SLASHF2 datasheet(10/79 Pages) NXP

10 / 79 page

PCF2119X_5

Product data sheet

Rev. 05 — 13 August 2009

10 of 79

NXP Semiconductors

PCF2119x

LCD controllers/drivers

see Section 10.2.3.4). If still a higher multiplication factor is chosen, VLCD will not increase

(it is set by Equation 2) but the current that can be delivered will be higher. Also current

consumption increases (see Section 16.6).

When the VLCD generator and the direct mode are switched off, an external voltage may

be supplied at connected pins VLCDIN and VLCDOUT.VLCDIN and VLCDOUT may be higher or

lower than VDD2.

In direct mode (see Icon_ctl instruction, Section 10.2.3.3) the internal VLCD generator is

turned off and the VLCDOUT output voltage is directly connected to VDD2. This reduces the

current consumption depending on VDD2 value and LCD liquid properties.

The VLCD generator ensures that, as long as VDD is in the valid range (2.2 V to 4 V), the

required peak voltage VLCD = 6.5 V can be generated at any time.

8.5 LCD bias voltage generator

The intermediate bias voltages for the LCD display are also generated on-chip. This

removes the need for an external resistive bias chain and signiﬁcantly reduces the system

current consumption. The optimum value of VLCD depends on the multiplex rate, the LCD

threshold voltage (Vth) and the number of bias levels. Using a 5-level bias scheme for the

1:18 multiplex rate allows VLCD < 5 V for most LCD liquids.

The intermediate bias levels for the different multiplex rates are shown in Table 6. These

bias levels are automatically set to the given values when switching to the corresponding

multiplex rate.

8.6 LCD row and column drivers

The PCF2119x contains 18 row and 80 column drivers, which drive the appropriate LCD

bias voltages in sequence to the display in accordance with the data to be displayed. R17

and R18 drive the icon rows. Unused outputs should be left open.

The bias voltages and the timing are selected automatically when the number of lines in

the display is selected. Figure 3 to Figure 5 show typical waveforms.

Table 6.

Bias levels as a function of multiplex rate

Multiplex

rate

Number of

bias levels

Bias voltages

1:18

VLCD

VSS

1:9

VLCD

VSS

1:2

VLCD

VSS

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

--- V

LCD

–

()

PCF2119RU/2/F2 Datasheet(PDF) 10 Page - NXP Semiconductors

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