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PCF2119RU/2/F2 Datasheet(PDF) 50 Page - NXP Semiconductors |
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PCF2119RU/2/F2 Datasheet(HTML) 50 Page - NXP Semiconductors |
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50 / 79 page ![]() PCF2119X_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 13 August 2009 50 of 79 NXP Semiconductors PCF2119x LCD controllers/drivers [1] Tested on sample base. [2] All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to VIL and VIH with an input voltage swing of VSS to VDD. [3] Cb = total capacitance of one bus line in pF. tSU;STO set-up time for STOP condition 0.6 - - µs tSP pulse width of spikes that must be suppressed by the input filter - - 50 ns tBUF bus free time between a STOP and START condition 1.3 - - µs Table 36. Dynamic characteristics …continued VDD1 = 1.5 V to 5.5 V; VDD2 =VDD3 = 2.2 V to 4.0 V; VSS =0V; VLCD = 2.2 V to 6.5 V; Tamb = −40 °C to +85 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Fig 34. Parallel bus write operation sequence; writing data from microcontroller to PCF2119x Fig 35. Parallel bus read operation sequence; writing data from PCF2119x to microcontroller RS E DB0 to DB7 VIH VIL VIL VIL VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VIL tcy(en) tsu(A) tw(en) th(A) th(A) th(D) tsu(D) valid data mbk474 R/W RS E DB0 to DB7 VIH VIH VIH VIL VIH VIL VOH VOL VOH VOL VIH VIL VIH VIL VIL tcy(en) tsu(A) tw(en) th(A) th(A) th(D) td(DV) mbk475 R/W |
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