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LT3743

3743f

APPLICATIONS INFORMATION

The EN/UVLO pin as an absolute maximum voltage of

6V. To accommodate the largest range of applications,

there is an internal Zener diode that clamps this pin. For

applications where the supply range is greater than 4:1,

size R2 greater than 375k.

Thermal Shutdown

The internal thermal shutdown within the LT3743 engages at

163°C and terminates switching, resets soft-start and shuts

down the PWMGL and PWMGH drivers. When the part has

cooled to 155°C, the internal reset is cleared and soft-start

is allowed to charge once the PWM signal is asserted.

Switching Frequency Synchronization

The nominal switching frequency of the LT3743 is deter-

mined by the resistor from the RT pin to ground and may

be set from 200kHz to 1MHz. The internal oscillator may

also be synchronized to an external clock through the SYNC

pin. The external clock applied to the SYNC pin must have

a logic low below 0.3V and a logic high higher than 1.25V.

The input frequency must be 20% higher than the frequency

determined by the resistor at the RT pin. The duty cycle of

the input signal needs to be greater than 10% and less than

90%. Input signals outside of these speciﬁed parameters

will cause erratic switching behavior and subharmonic

oscillations. When synchronizing to an external clock,

please be aware that there will be a ﬁxed delay from the input

clock edge to the edge of switch. The SYNC pin must be

grounded if the synchronization to an external clock is not

required. When SYNC is grounded, the switching frequency

is determined by the resistor at the RT pin.

Shutdown and UVLO

The LT3743 has an internal UVLO that terminates switching,

resets all synchronous logic, and discharges the soft-start

capacitor for input voltages below 4.2V. The LT3743 also

has a precision shutdown at 1.55V on the EN/UVLO pin.

Partial shutdown occurs at 1.55V and full shutdown is

guaranteed below 0.5V with <2μA IQ in the full shutdown

state. Below 1.5V, an internal current source provides 5.5μA

of pull-down current to allow for programmable UVLO

hysteresis. The following equations determine the voltage

divider resistors for programming the UVLO voltage and

hysteresis as conﬁgured in Figure 14.

μA

HYST

UVLO

155

⎛

⎝⎜

⎞

⎠⎟

.•

–.

LT3743

VIN

3743 F14

EN/UVLO

Figure 14. UVLO Conﬁguration

LED Current Derating Using the CTRL_T Pin

The LT3743 is designed speciﬁcally for driving high cur-

rent LEDs. Most high current LEDs require derating the

maximum current based on operating temperature to

prevent damage to the LED. In addition, many applications

have thermal limitations that will require the regulated

current to be reduced based on LED and/or board tem-

perature. To achieve this, the LT3743 uses the CTRL_T

pin to reduce the effective regulated current in the LED

for both the high and low control currents. While CTRL_H

and CTRL_L program the regulated current in the LED,

CTRL_T can be conﬁgured to reduce this regulated cur-

rent based on the analog voltage at the CTRL_T pin. The

LED/board temperature derating is programmed using a

resistor divider with a temperature dependant resistance

(Figure 15). When the board/LED temperature rises, the

CTRL_T voltage will decrease. To reduce the regulated

current, the CTRL_T voltage must be lower than voltage

at the CTRL_L and CTRL_H pins.

LT3743

VREF

RNTC

(OPTION A TO D)

3743 F15

CTRL_T

RNTC

Figure 15. LED Current Derating vs Temperature

Using NTC Resistor

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