56F8366 datasheet(26/182 Pages) FREESCALE

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56F8366 Technical Data, Rev. 7

Freescale Semiconductor

Preliminary

GPIOD1

(CS3)

(CAN2_RX)

Schmitt

Input/

Output

Schmitt

Input

Input,

pull-up

enabled

Port D GPIO — This GPIO pin can be individually programmed as

an input or output pin.

Chip Select — CS3 may be programmed within the EMI module to

act as a chip select for specific areas of the external memory map.

Depending upon the state of the DRV bit in the EMI Bus Control

Most designs will want to change the DRV state to DRV = 1 instead of

using the default setting.

FlexCAN2 Receive Data — This is the CAN input. This pin has an

internal pull-up resistor.

At reset, this pin is configured as GPIO. This configuration can be

changed by setting bit 1 in the GPIO_D_PER register. Then

change bit 5 in the SIM_GPS register to select the desired

peripheral function.

To deactivate the internal pull-up resistor, clear bit 1 in the

GPIOD_PUR register.

TXD0

(GPIOE0)

Output

Input/

Output

In reset,

output is

disabled,

pull-up is

enabled

Transmit Data — SCI0 transmit data output

Port E GPIO — This GPIO pin can be individually programmed as

an input or output pin.

After reset, the default state is SCI output.

To deactivate the internal pull-up resistor, clear bit 0 in the

GPIOE_PUR register.

RXD0

(GPIOE1)

Input

Input/

Output

Input,

pull-up

enabled

Receive Data — SCI0 receive data input

Port E GPIO — This GPIO pin can be individually programmed as

an input or output pin.

After reset, the default state is SCI output.

To deactivate the internal pull-up resistor, clear bit 1 in the

GPIOE_PUR register.

Table 2-2 Signal and Package Information for the 144-Pin LQFP

Signal Name

Pin No.

Type

State

During

Reset

Signal Description

56F8366 Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc

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