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56F8366 Datasheet(PDF) 32 Page - Freescale Semiconductor, Inc

Part # 56F8366
Description  16-bit Digital Signal Controllers
PDF  182 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

56F8366 Datasheet(HTML) 32 Page - Freescale Semiconductor, Inc

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56F8366 Technical Data, Rev. 7
32
Freescale Semiconductor
Preliminary
INDEX1
(TB2)
(MISO1)
(GPIOC2)
8Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
Index1 — Quadrature Decoder 1, INDEX input
TB2 — Timer B, Channel 2
SPI 1 Master In/Slave Out — This serial data pin is an input to a
master device and an output from a slave device. The MISO line of
a slave device is placed in the high-impedance state if the slave
device is not selected. The slave device places data on the MISO
line a half-cycle before the clock edge the master device uses to
latch the data. To activate the SPI function, set the INDEX_ALT bit
in the SIM_GPS register. For details, see Part 6.5.8.
Port C GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is INDEX1.
To deactivate the internal pull-up resistor, clear bit 2 in the
GPIOC_PUR register.
HOME1
(TB3)
(SS1)
(GPIOC3)
9Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
Home — Quadrature Decoder 1, HOME input
TB3 — Timer B, Channel 3
SPI 1 Slave Select — In the master mode, this pin is used to
arbitrate multiple masters. In slave mode, this pin is used to select
the slave. To activate the SPI function, set the HOME_ALT bit in
the SIM_GPS register. For details, see Part 6.5.8.
Port C GPIO — This GPIO pin can be individually programmed as
input or an output pin.
In the 56F8366, the default state after reset is HOME1.
In the 56F8166, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pull-up resistor, clear bit 3 in the
GPIOC_PUR register.
Table 2-2 Signal and Package Information for the 144-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description



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