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CAP1005 Datasheet(PDF) 13 Page - SMSC Corporation

Part # CAP1005
Description  5 and 6 Channel Capacitive Touch Sensor
PDF  53 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

CAP1005 Datasheet(HTML) 13 Page - SMSC Corporation

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5 and 6 Channel Capacitive Touch Sensor
Datasheet
SMSC CAP1005 / CAP1006
13
Revision 1.1 (08-05-09)
DATASHEET
Chapter 3 Communications
3.1
Communications
The CAP1006-1 communicates using the SMBus or I2C protocol. The CAP1006-2 communicates using
the 2-wire proprietary BC-Link protocol. The CAP1005 communicates using 4-wire SPI bus.
Regardless of the communications mechanism, the device functionality remains unchanged.
3.1.1
SMBus (I2C) Communications
When configured to communicate via the SMBus, the CAP1006 supports the following protocols: Send
Byte, Receive Byte, Read Byte, and Write Byte. In addition, the device supports I2C formatting for block
read and block write protocols.
See Section 3.2 and Section 3.3 for more information on the SMBus bus and protocols respectively.
3.1.2
SPI Communications
The CAP1005 is configured to communicate via SPI bus, using a 4-wire protocol. It does not support
the 3-wire protocol.
See Section 3.4 and Section 3.5 for more information on the SPI bus and protocols respectively.
3.1.3
BC-Link Communications
When BC-Link communications are used, the CAP1006 supports the read byte protocol and the write
byte protocol.
See Section 3.6 for more information on the BC-Link Bus and protocols respectively.
APPLICATION NOTE: Upon power up, the CAP1006 will not respond to any communications for up to 15ms. After
this time, full functionality is available.
3.2
System Management Bus
The CAP1006 communicates with a host controller, such as an SMSC SIO, through the SMBus. The
SMBus is a two-wire serial communication protocol between a computer host and its peripheral
devices. A detailed timing diagram is shown in Figure 3.1. Stretching of the SMCLK signal is supported;
however, the CAP1006 will not stretch the clock signal.
Figure 3.1 SMBus Timing Diagram
SMDATA
SMCLK
TLOW
TRISE
THIGH
TFALL
TBUF
THD:STA
P
S
S - Start Condition
P - Stop Condition
THD:DAT
TSU:DAT
TSU:STA
THD:STA
P
TSU:STO
S



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