ICS1893 datasheet(138/152 Pages) ICST

138 / 152 page

ICS1893 Rev C 6/6/00

June, 2000

138

Chapter 10

DC and AC Operating Conditions

ICS1893 Data Sheet - Release

10.5.12

MII / 100M Stream Interface: Transmit Latency

Table 10-19 lists the significant time periods for the MII / 100 Stream Interface transmit latency. The time

periods consist of timings of signals on the following pins:

• TXEN

• TXCLK

• TXD (that is, TXD[3:0])

• TP_TX (that is, TP_TXP and TP_TXN)

Figure 10-13 shows the timing diagram for the time periods.

† The IEEE maximum is 18 bit times.

Figure 10-13.

MII / 100M Stream Interface Transmit Latency Timing Diagram

Table 10-19.

MII / 100M Stream Interface Transmit Latency

Time

Period

Parameter

Conditions

Min.

Typ.

Max.

Units

TXEN Sampled to MDI Output of First

Bit of /J/ †

MII mode

–

2.8

Bit times

TXD Sampled to MDI Output of First

Bit of /J/ †

100M Stream Interface

–

6.1

Bit times

TXEN

TXCLK

TXD

TP_TX†

† Shown

unscrambled.

Preamble /K/

Preamble /J/

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