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ATmega16U4 Datasheet(PDF) 292 Page - ATMEL Corporation |
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ATmega16U4 Datasheet(HTML) 292 Page - ATMEL Corporation |
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292 / 408 page ![]() 292 7766D–AVR–01/09 ATmega16U4/ATmega32U4 When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the bits are changed. 23.1 Analog Comparator Multiplexed Input It is possible to select any of the ADC13..0 pins to replace the negative input to the Analog Com- parator. The ADC multiplexer is used to select this input, and consequently, the ADC must be switched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit (ACME in ADCSRB) is set and the ADC is switched off (ADEN in ADCSRA is zero), and MUX2..0 in ADMUX select the input pin to replace the negative input to the Analog Comparator, as shown in Table 23-2. If ACME is cleared or ADEN is set, the Bandgap reference is applied to the negative input to the Analog Comparator. 23.1.1 Digital Input Disable Register 1 – DIDR1 • Bit 0 – AIN0D: AIN0 Digital Input Disable When this bit is written logic one, the digital input buffer on the AIN0 pin is disabled. The corre- sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the AIN0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer. Table 23-2. Analog Comparator Multiplexed Input ACME ADEN MUX2..0 Analog Comparator Negative Input 0 x xxx Bandgap Ref. 1 1 xxx Bandgap Ref. 1 0 000 ADC0 1 0 001 ADC1 10 010 N/A 10 011 1 0 100 ADC4 1 0 101 ADC5 1 0 110 ADC6 1 0 111 ADC7 Bit 7654 32 1 0 – – – – – – – AIN0D DIDR1 Read/Write RRRR RR R R/W Initial Value 0000 00 0 0 |
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