ST7689 datasheet(39/195 Pages) SITRONIX

39 / 195 page

ST7689

Version 1.0

Page 39 of 195

2009/10

Before writing to the RAM, a window must be defined into which will be written. The window is programmable via the

command registers XS, YS designating the start address and XE, YE designating the end address.

For example the whole display contents will be written, the window is defined by the following values: XS=0 (0h) YS=0

(0h) and XE=127 (7Fh), YE=159 (9Fh).

In vertical addressing mode (MV=1), the Y-address increments after each byte, after the last Y-address (Y=YE), Y

wraps around to YS and X increments to address the next column. In horizontal addressing mode (MV=0), the X-address

increments after each byte, after the last X-address (X=XE), X wraps around to SC and Y increments to address the next

row. After the every last address (X=XE and Y=YE) the address pointers wrap around to address (X=XS and Y=YS). For

flexibility in handling a wide variety of display architectures, the commands “CASET, RASET” and “MADCTL”, define flags

MX, MY and MV, which allows mirroring of the X-address and Y-address. All combinations of flags are allowed. Figure 5

show the available combinations of writing to the display RAM. When MX, MY and MV will be changed the data must be

rewritten to the display RAM.

For each image condition, the controls for the column and row counters apply as below:

Condition

Column Counter

Row Counter

When RAMWR command is accepted

Return to “Start

Column (XS)”

Return to “Start

Row (YS)”

Complete Pixel Read / Write action

Increment by 1

No change

The Column counter value is larger than “End Column (XE)”

Return to “Start

Column (XS)”

Increment by 1

The Row counter value is larger than “End Row (YE)”

Return to “Start

Column (XS)”

Return to “Start

Row (YS)”

ST7689 Datasheet(PDF) 39 Page - Sitronix Technology Co., Ltd.