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ST7038 Datasheet(PDF) 49 Page - Sitronix Technology Co., Ltd. |
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ST7038 Datasheet(HTML) 49 Page - Sitronix Technology Co., Ltd. |
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49 / 63 page  ST7038 Ver 1.3 49/63 2008/05/27 8080 Interface tAH8 tAW8 tCYC8 tCCLR,tCCLW tCCHR,tCCHW tDS8 tACC8 tOH8 tDH8 WR,RD A0 D0 to D7 (Write) D0 to D7 (Read) CSB Ta = -30 ~ 85 oC Item VDD=1.8V VDD=2.5V VDD=3.3V Signal Symbol Min. Max. Min. Max. Min. Max. Units Address hold time RS tAH8 80 - 30 - 30 - *Address setup time RS tAW8 0 - 0 - 0 - ns System cycle time RS tCYC8 240 - 190 - 150 - ns Enable L pulse width (WRITE) D0 to D7 tCCLW 180 - 140 - 110 - Enable H pulse width (WRITE) D0 to D7 tCCHW 20 - 20 - 20 - ns Enable L pulse width (READ) D0 to D7 tCCLR 180 - 140 - 110 - Enable H pulse width (READ) D0 to D7 tCCHR 20 - 20 - 20 - ns WRITE Data setup time Write tDS8 120 - 80 - 70 - ns WRITE Data hold time Write tDH8 80 - 50 - 50 - ns READ access time, CL= 100 pF Read tACC8 - 240 - 220 - 180 ns READ Output disable time, CL = 100 pF Read tOH8 120 - - 100 - 80 ns Note: All timing is specified using 20% and 80% of VDD as the reference. |
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