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LPC1766 Datasheet(PDF) 5 Page - NXP Semiconductors

Part # LPC1766
Description  32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
PDF  66 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1766 Datasheet(HTML) 5 Page - NXP Semiconductors

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LPC1769_68_67_66_65_64_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 1 February 2010
5 of 66
NXP Semiconductors
LPC1769/68/67/66/65/64
32-bit ARM Cortex-M3 microcontroller
5.
Block diagram
Grey-shaded blocks represent peripherals with connection to the GPDMA.
Fig 1.
Block diagram
SRAM 32/64 kB
ARM
CORTEX-M3
TEST/DEBUG
INTERFACE
FLASH
ACCELERATOR
FLASH
512/256/128 kB
DMA
CONTROLLER
ETHERNET
CONTROLLER
WITH DMA(2)
USB HOST/
DEVICE/OTG
CONTROLLER
WITH DMA(3)(4)
I-code
bus
D-code
bus
system
bus
AHB TO
APB
BRIDGE 0
HIGH-SPEED
GPIO
AHB TO
APB
BRIDGE 1
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
XTAL1
XTAL2
RESET
clocks and
controls
JTAG
interface
debug
port
USB PHY
SSP0
UART2/3
I2S(1)
I2C2
RI TIMER
TIMER2/3
EXTERNAL INTERRUPTS
SYSTEM CONTROL
MOTOR CONTROL PWM
QUADRATURE ENCODER
SSP1
UART0/1
CAN1/2(4)
I2C0/1
SPI0
TIMER 0/1
WDT
PWM1
12-bit ADC
PIN CONNECT
GPIO INTERRUPT CONTROL
RTC
BACKUP REGISTERS
32 kHz
OSCILLATOR
APB slave group 1
APB slave group 0
DAC(1)
RTC POWER DOMAIN
LPC1769/68/67/66/65/64
master
master
master
002aad944
slave
slave
slave
slave
slave
ROM
slave
MULTILAYER AHB MATRIX
P0 to
P4
SDA2
SCL2
SCK0
SSEL0
MISO0
MOSI0
SCK1
SSEL1
MISO1
MOSI1
RXD2/3
TXD2/3
PHA, PHB
INDEX
EINT[3:0]
AOUT
MCOA[2:0]
MCOB[2:0]
MCI[2:0]
MCABORT
4
× MAT2
2
× MAT3
2
× CAP2
2
× CAP3
3
× I2SRX
3
× I2STX
TX_MCLK
RX_MCLK
RTCX1
RTCX2
VBAT
PWM1[7:0]
2
× MAT0/1
2
× CAP0/1
RD1/2
TD1/2
SDA0/1
SCL0/1
AD0[7:0]
SCK/SSEL
MOSI/MISO
8
× UART1
RXD0/TXD0
P0, P2
PCAP1[1:0]
RMII pins
USB pins
CLKOUT
(1)LPC1769/68/67/66/65 only
(2)LPC1769/68/67/66/64 only
(3)LPC1764 USB device only
(4)LPC1769/68/66/65/64 only



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