DM9010BEP datasheet(4/62 Pages) DAVICOM

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DM9010B

Single Chip Ethernet Controller with General Processor Interface

Preliminary

Version: DM9010B--DS-P01

September 5, 2007

6.47 MEMORY DATA WRITE COMMAND WITH ADDRESS INCREMENT REGISTER (F8H) .............................................. 29

6.48 MEMORY DATA WRITE ADDRESS REGISTER (FAH~FBH)............................................................................... 29

6.49 TX PACKET LENGTH REGISTER (FCH~FDH) ............................................................................................... 29

6.50 INTERRUPT STATUS REGISTER (FEH) .......................................................................................................... 30

6.51 INTERRUPT MASK REGISTER (FFH).............................................................................................................. 30

7. EEPROM FORMAT........................................................................................................... 31

8. MII REGISTER DESCRIPTION ......................................................................................... 32

8.1 BASIC MODE CONTROL REGISTER (BMCR) - 00 ............................................................................................ 33

8.2 BASIC MODE STATUS REGISTER (BMSR) - 01 ............................................................................................... 34

8.3 PHY ID IDENTIFIER REGISTER #1 (PHYID1) - 02............................................................................................ 35

8.4 PHY ID IDENTIFIER REGISTER #2 (PHYID2) - 03............................................................................................ 35

8.5 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) - 04........................................................................ 35

8.6 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR) – 05......................................................... 36

8.7 AUTO-NEGOTIATION EXPANSION REGISTER (ANER) - 06................................................................................ 37

8.8 DAVICOM SPECIFIED CONFIGURATION REGISTER (DSCR) - 16..................................................................... 38

8.9 DAVICOM SPECIFIED CONFIGURATION AND STATUS REGISTER (DSCSR) - 17 .............................................. 39

8.10 10BASE-T CONFIGURATION/STATUS (10BTCSR) - 18................................................................................ 40

8.11 POWER DOWN CONTROL REGISTER (PWDOR) - 19 ..................................................................................... 41

8.12 (SPECIFIED CONFIG) REGISTER – 20............................................................................................................. 41

9. FUNCTIONAL DESCRIPTION .......................................................................................... 42

9.1 HOST INTERFACE........................................................................................................................................... 42

9.2 DIRECT MEMORY ACCESS CONTROL.............................................................................................................. 42

9.3 PACKET TRANSMISSION................................................................................................................................. 42

9.4 PACKET RECEPTION ...................................................................................................................................... 42

9.5 100BASE-TX OPERATION.............................................................................................................................. 43

9.5.1 4B5B Encoder...................................................................................................................................... 43

9.5.2 Scrambler............................................................................................................................................. 43

9.5.3 Parallel to Serial Converter.................................................................................................................. 43

9.5.4 NRZ to NRZI Encoder.......................................................................................................................... 43

9.5.5 MLT-3 Converter.................................................................................................................................. 43

9.5.6 MLT-3 Driver ........................................................................................................................................ 43

9.5.7 4B5B Code Group ............................................................................................................................... 44

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