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LTC3890

3890f

APPLICATIONS INFORMATION

The peak-to-peak drive levels are set by the INTVCC

voltage. This voltage is typically 5.1V during start-up

(see EXTVCC Pin Connection). Consequently, logic-level

threshold MOSFETs must be used in most applications.

Pay close attention to the BVDSS speciﬁcation for the

MOSFETs as well.

Selection criteria for the power MOSFETs include the

on-resistance, RDS(ON), Miller capacitance, CMILLER, input

voltage and maximum output current. Miller capacitance,

CMILLER, can be approximated from the gate charge curve

usually provided on the MOSFET manufacturers’ data

sheet. CMILLER is equal to the increase in gate charge

along the horizontal axis while the curve is approximately

ﬂat divided by the speciﬁed change in VDS. This result is

then multiplied by the ratio of the application applied VDS

to the gate charge curve speciﬁed VDS. When the IC is

operating in continuous mode the duty cycles for the top

and bottom MOSFETs are given by:

Main Switch Duty Cycle

Synchronous S

OUT

witch Duty Cycle

OUT

−

The MOSFET power dissipations at maximum output

current are given by:

PMAIN =

VOUT

VIN

IMAX

()

2 1+

()RDS(ON) +

VIN

()

IMAX

RDR

() CMILLER

() •

VINTVCC –VTHMIN

VTHMIN

()

PSYNC =

VIN –VOUT

VIN

IMAX

()

2 1+

()RDS(ON)

where δ is the temperature dependency of RDS(ON) and

RDR (approximately 2Ω) is the effective driver resistance

at the MOSFET’s Miller threshold voltage. VTHMIN is the

typical MOSFET minimum threshold voltage.

Both MOSFETs have I2R losses while the topside N-channel

equation includes an additional term for transition losses,

which are highest at high input voltages. For VIN < 20V

the high current efﬁciency generally improves with larger

MOSFETs, while for VIN > 20V the transition losses rapidly

increase to the point that the use of a higher RDS(ON) device

with lower CMILLER actually provides higher efﬁciency. The

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during

a short-circuit when the synchronous switch is on close

to 100% of the period.

The term (1+ δ) is generally given for a MOSFET in the

form of a normalized RDS(ON) vs Temperature curve, but

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs.

The optional Schottky diodes D3 and D4 shown in

Figure 11 conduct during the dead-time between the

conduction of the two power MOSFETs. This prevents

the body diode of the bottom MOSFET from turning on,

storing charge during the dead-time and requiring a

reverse recovery period that could cost as much as 3%

in efﬁciency at high VIN. A 1A to 3A Schottky is generally

a good compromise for both regions of operation due

to the relatively small average current. Larger diodes

result in additional transition losses due to their larger

junction capacitance.

CIN and COUT Selection

The selection of CIN is simpliﬁed by the 2-phase architec-

ture and its impact on the worst-case RMS current drawn

through the input network (battery/fuse/capacitor). It can be

shown that the worst-case capacitor RMS current occurs

when only one controller is operating. The controller with

the highest (VOUT)(IOUT) product needs to be used in the

formula shown in Equation 1 to determine the maximum

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