WM8731 datasheet(35/56 Pages) WOLFSON

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WM8731

Advanced Information

WOLFSON MICROELECTRONICS LTD

AI Rev 2.0 February 2001

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

1:0

FORMAT[1:0]

Audio Data Format Select

11 = DSP Mode, frame sync + 2

data packed words

10 = I

2S Format, MSB-First left-1

justified

01 = MSB-First, left justified

00 = MSB-First, right justified

3:2

IWL[1:0]

Input Audio Data Bit Length Select

11 = 32 bits

10 = 24 bits

01 = 20 bits

00 = 16 bits

LRP

DACLRC phase control (in left, right

or I2S modes)

1 = Right Channel DAC data when

DACLRC high

0 = Right Channel DAC data when

DACLRC low

(opposite phasing in I

2S mode)

DSP mode A/B select (in DSP mode

only)

1 = MSB is available on 2nd BCLK

rising edge after DACLRC rising

edge

0 = MSB is available on 1st BCLK

rising edge after DACLRC rising

edge

LRSWAP

DAC Left Right Clock Swap

1 = Right Channel DAC Data Left

0 = Right Channel DAC Data Right

Master Slave Mode Control

1 = Enable Master Mode

0 = Enable Slave Mode

0000111

Digital Audio

Interface

Format

BCLKINV

Bit Clock Invert

1 = Invert BCLK

0 = Don’t invert BCLK

Table 14 Digital Audio Interface Control

Note: If right justified 32 bit mode is selected then the WM8731 defaults to 24 bits.

MASTER AND SLAVE MODE OPERATION

The WM8731 can be configured as either a master or slave mode device. As a master mode device

the WM8731 controls sequencing of the data and clocks on the digital audio interface. As a slave

device the WM8731 responds with data to the clocks it receives over the digital audio interface. The

mode is set with the MS bit of the control register as shown in Table 15.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

0000111

Digital Audio Interface

Format

Master Slave Mode Control

1 = Enable Master Mode

0 = Enable Slave Mode

Table 15 Programming Master/Slave Modes

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