74HC_HCT193_3

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 03 — 23 May 2007

2 of 29

NXP Semiconductors

74HC193; 74HCT193

Presettable synchronous 4-bit binary up/down counter

Q3) LOW. If one of the clock inputs is LOW during and after a reset or load operation, the

next LOW-to-HIGH transition of that clock will be interpreted as a legitimate signal and will

be counted.

2.

Features

3.

Ordering information

4.

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature

range

Name

Description

Version

74HC193D

−40 °C to +125 °C

SO16

plastic small outline package; 16 leads;

body width 3.9 mm

SOT109-1

74HC193DB

−40 °C to +125 °C

SSOP16

plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1

74HC193N

−40 °C to +125 °C

DIP16

plastic dual in-line package; 16 leads (300 mil)

SOT38-4

74HC193PW

−40 °C to +125 °C

TSSOP16

plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

SOT403-1

74HCT193D

−40 °C to +125 °C

SO16

plastic small outline package; 16 leads;

body width 3.9 mm

SOT109-1

74HCT193DB

−40 °C to +125 °C

SSOP16

plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1

74HCT193N

−40 °C to +125 °C

DIP16

plastic dual in-line package; 16 leads (300 mil)

SOT38-4

74HCT193PW

−40 °C to +125 °C

TSSOP16

plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

SOT403-1

Fig 1.

Functional diagram

Fig 2.

Logic symbol

001aag405

FLIP-FLOPS

COUNTER

PL

11

CPU

5

TCD

13

TCU

12

Q0

3267

151109

Q1

Q2

Q3

D0

D1

D2

D3

CPD

4

MR

14

001aag409

MR

Q0

Q1

Q2

Q3

PL

D0

D1

D2

D3

14

3267

11

151109

4

CPD

TCD

TCU

5

13

12

CPU