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74LVC169D Datasheet(PDF) 12 Page - NXP Semiconductors |
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74LVC169D Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 22 page ![]() 74LVC169_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 8 June 2009 12 of 22 NXP Semiconductors 74LVC169 Presettable synchronous 4-bit up/down binary counter Measurement points are given in Table 8. Logic levels: VOL and VOH are the typical output voltage levels that occur with the output load. Fig 9. Input (CET) to output (TC) propagation delays 001aaa652 CET TC tPHL tPLH GND VI VM VOH VOL VM VI Measurement points are given in Table 8. Logic levels: VOL and VOH are the typical output voltage levels that occur with the output load. Fig 10. The up/down control input (U/D) to output (TC) propagation delays 001aaa653 U/D TC tPHL tPLH GND VI VM VOH VOL VM VI |
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