GTL2008_4

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Product data sheet

Rev. 04 — 19 February 2010

2 of 22

NXP Semiconductors

GTL2008

GTL translator with power good control and high-impedance outputs

Latch-up testing is done to JEDEC Standard JESD78 Class II, Level A which exceeds

500 mA

Package offered: TSSOP28

3.

Quick reference data

4.

Ordering information

Table 1.

Quick reference data

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

input/output capacitance

-

2.5

3.5

pF

-

1.5

2.5

pF

LOW to HIGH

propagation delay

nA to nBI; see Figure 4

14

8

ns

nBI to nA or nAO (open-drain outputs);

see Figure 14

213

18

ns

HIGH to LOW

propagation delay

nA to nBI; see Figure 4

2

5.5

10

ns

nBI to nA or nAO (open-drain outputs);

see Figure 14

2

4

10

ns

LOW to HIGH

propagation delay

nA to nBI; see Figure 4

14

8

ns

nBI to nA or nAO (open-drain outputs);

see Figure 14

213

18

ns

HIGH to LOW

propagation delay

nA to nBI; see Figure 4

2

5.5

10

ns

nBI to nA or nAO (open-drain outputs);

see Figure 14

2

4

10

ns

Table 2.

Ordering information

Type

number

Topside

mark

Package

Name

Description

Version

GTL2008PW

GTL2008

TSSOP28

plastic thin shrink small outline package; 28 leads; body width 4.4 mm

SOT361-1