| Electronic Components Datasheet Search |
|
LPC2939 Datasheet(PDF) 21 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
LPC2939 Datasheet(HTML) 21 Page - NXP Semiconductors |
|
21 / 99 page ![]() LPC2939_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 7 April 2010 21 of 99 NXP Semiconductors LPC2939 ARM9 microcontroller with CAN, LIN, and USB [1] This clock is always on (cannot be switched off for system safety reasons). [2] In the peripheral subsystem parts of the Timers, watchdog timer, SPI and UART have their own clock source. See Section 6.13 for details. [3] In the Power Clock and Reset Control subsystem parts of the CGU, RGU, and PMU have their own clock source. See Section 6.16 for details. [4] The clock should remain activated when system wake-up on timer or UART is required. BASE_MSCSS_CLK CLK_MSCSS_APB APB side of the MSCSS CLK_MSCSS_MTMR0 timer 0 in the MSCSS CLK_MSCSS_MTMR1 timer 1 in the MSCSS CLK_MSCSS_PWM0 PWM 0 CLK_MSCSS_PWM1 PWM 1 CLK_MSCSS_PWM2 PWM 2 CLK_MSCSS_PWM3 PWM 3 CLK_MSCSS_ADC0_APB APB side of ADC 0 CLK_MSCSS_ADC1_APB APB side of ADC 1 CLK_MSCSS_ADC2_APB APB side of ADC 2 CLK_MSCSS_QEI Quadrature Encoder Interface (QEI) BASE_UART_CLK CLK_UART0 UART 0 interface clock CLK_UART1 UART 1 interface clock BASE_ICLK0_CLK - CGU1 input clock BASE_SPI_CLK CLK_SPI0 SPI 0 interface clock CLK_SPI1 SPI 1 interface clock CLK_SPI2 SPI 2 interface clock BASE_TMR_CLK CLK_TMR0 timer 0 clock for counter part CLK_TMR1 timer 1 clock for counter part CLK_TMR2 timer 2 clock for counter part CLK_TMR3 timer 3 clock for counter part BASE_ADC_CLK CLK_ADC0 control of ADC 0, capture sample result CLK_ADC1 control of ADC 1, capture sample result CLK_ADC2 control of ADC 2, capture sample result - reserved - BASE_ICLK1_CLK - CGU1 input clock Table 8. CGU1 base clock and branch clock overview Base clock Branch clock name Parts of the device clocked by this branch clock BASE_OUT_CLK CLK_OUT_CLK pin CLK_OUT BASE_USB_CLK CLK_USB_CLK USB clock BASE_USB_I2C_CLK CLK_USB_I2C_CLK USB OTG I2C clock Table 7. CGU0 base clock and branch clock overview …continued Base clock Branch clock name Parts of the device clocked by this branch clock |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |