 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
P89LPC9103 Datasheet(PDF) 4 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
P89LPC9103 Datasheet(HTML) 4 Page - NXP Semiconductors |
|
|
4 / 61 page  P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 10 July 2007 4 of 61 NXP Semiconductors P89LPC9102/9103/9107 8-bit microcontrollers with two-clock accelerated 80C51 core 5. Block diagram Fig 1. Block diagram of P89LPC9102 ACCELERATED 2-CLOCK 80C51 CPU 1 kB FLASH PORT 1 CONFIGURABLE I/Os PORT 0 CONFIGURABLE I/Os KEYPAD INTERRUPT PROGRAMMABLE OSCILLATOR DIVIDER CPU clock CONFIGURABLE OSCILLATOR ON-CHIP RC OSCILLATOR WITH CLOCK DOUBLER OPTION internal bus POWER MONITOR (POWER-ON RESET, BROWNOUT RESET) 002aaa967 128 BYTE RAM ANALOG COMPARATORS ADC1/DAC1 P89LPC9102 WATCHDOG TIMER AND OSCILLATOR REAL-TIME CLOCK/ SYSTEM TIMER TIMER 0 TIMER 1 CLKOUT CLKIN P1.2, P1.5 P0[1:5], P0.7 KBI1 AD10 AD11 AD12 DAC1 T0 T1 CIN1A CIN1B AD13 KBI2 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
