PCA2125 datasheet(7/36 Pages) NXP

7 / 36 page

PCA2125_1

Product data sheet

Rev. 01 — 28 July 2008

7 of 36

NXP Semiconductors

PCA2125

SPI Real-time clock/calendar

8.3 Control registers

Table 6.

Control_1 register (address 00h) bit description

Bit

Symbol

Value

Description

Reference

EXT_TEST

normal mode

Section 8.9

external clock test mode

unused

STOP

RTC source clock runs

Section 8.10

RTC divider chain ﬂip-ﬂops are asynchronously set

to logic 0; the RTC clock is stopped (CLKOUT at

32.768 kHz, 16.384 kHz or 8.192 kHz is still

available)

unused

POR_OVRD

power-on reset override facility is disabled; set to

logic 0 for normal operation

Section 8.2.1

power-on reset override is enabled

12_24

24 hour mode is selected

Table 11

12 hour mode is selected

1 to 0

unused

Table 7.

Control_2 register (address 01h) bit description

Bit

Symbol

Value

Description

Reference

minute interrupt is disabled

Section 8.6.1

minute interrupt is enabled

second interrupt is disabled

second interrupt is enabled

MSF

no minute or second interrupt generated

Section 8.6

ﬂag set when minute or second interrupt generated;

ﬂag must be cleared to clear interrupt

TI_TP

interrupt pin follows timer ﬂags

Section 8.7.2

interrupt pin generates a pulse

no alarm interrupt generated

Section 8.5.1

ﬂag set when alarm triggered; ﬂag must be cleared

to clear interrupt

no countdown timer interrupt generated

ﬂag set when countdown timer interrupt generated;

ﬂag must be cleared to clear interrupt

AIE

no interrupt generated from the alarm ﬂag

Section 8.7.3

interrupt generated when alarm ﬂag set

TIE

no interrupt generated from the countdown timer

ﬂag

Section 8.7

interrupt generated when countdown timer ﬂag set

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