PCA8565TS datasheet(14/39 Pages) NXP

14 / 39 page

PCA8565_2

Product data sheet

Rev. 02 — 16 June 2009

14 of 39

NXP Semiconductors

PCA8565

Real time clock/calendar

Alarm registers which have their bit AE_x at logic 1 are ignored.

Table 23 shows an example for clearing bit AF but leaving bit TF unaffected. Clearing the

ﬂags is made by a write command; therefore bits 7, 6, 4, 1 and 0 must be written with their

previous values. Repeatedly re-writing these bits has no inﬂuence on the functional

behavior.

To prevent the timer ﬂags being overwritten while clearing AF, a logical AND is performed

during a write access. Writing a logic 1 will cause the ﬂag to maintain its value, whereas

writing a logic 0 will cause the ﬂag to be reset.

The following table shows what instruction must be sent to clear bit AF. In this example bit

TF is unaffected.

9.7 Timer functions

The 8-bit countdown timer at address 0Fh is controlled by the timer control register at

address 0Eh. The timer control register determines one of 4 source clock frequencies for

the timer (4.096 kHz, 64 Hz, 1 Hz, or 1

⁄

60 Hz) and enables or disables the timer. The timer

counts down from a software-loaded 8-bit binary value. At the end of every countdown,

the timer sets the timer ﬂag (TF). The TF is cleared using the interface. The asserted TF is

used to generate an interrupt (INT). The interrupt is generated as a pulsed signal every

countdown period or as a permanently active signal which follows the condition of TF.

Bit TI_TP is used to control this mode selection. When reading the timer, the actual

countdown value is returned.

Example where only the minute alarm is used and no other interrupts are enabled.

Fig 7.

AF timing

Table 22.

Flag location in register Control_2

Bit

Control_2

Table 23.

Example to clear only AF (bit 3) in register Control_2

Bit

Control_2

001aaf903

minute alarm

minutes counter

INT when AIE = 1

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