PCA9534 datasheet(8/25 Pages) NXP

8 / 25 page

PCA9534_3

Product data sheet

Rev. 03 — 6 November 2006

8 of 25

NXP Semiconductors

PCA9534

8-bit I2C-bus and SMBus low power I/O port with interrupt

Fig 8.

Write to Output Port register

A2 A1 A0

START condition

R/W

acknowledge

from slave

002aac472

acknowledge

from slave

SCL

SDA

write to port

data out

from port

tv(Q)

command byte

acknowledge

from slave

data to port

DATA 1

slave address

0000001

STOP

condition

data 1 valid

Fig 9.

Write to Conﬁguration register or Polarity Inversion register

A2 A1 A0

START condition

R/W

acknowledge

from slave

002aac473

acknowledge

from slave

SCL

SDA

data to

command byte

acknowledge

from slave

data to register

DATA

slave address

000001 1/0

STOP

condition

Fig 10. Read from register

A2 A1 A0

START condition

R/W

acknowledge

from slave

002aac474

acknowledge

from slave

SDA

command byte

acknowledge

from master

data from register

DATA (first byte)

slave address

STOP

condition

(repeated)

START condition

(cont.)

A2 A1 A0

R/W

acknowledge

from slave

slave address

at this moment master-transmitter becomes master-receiver

and slave-receiver becomes slave-transmitter

no acknowledge

from master

data from register

DATA (last byte)

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