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PCA9539D Datasheet(PDF) 16 Page - NXP Semiconductors |
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PCA9539D Datasheet(HTML) 16 Page - NXP Semiconductors |
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16 / 31 page ![]() PCA9539_PCA9539R_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 28 July 2008 16 of 31 NXP Semiconductors PCA9539; PCA9539R 16-bit I2C-bus and SMBus low power I/O port with interrupt and reset 8. Application design-in information Device address configured as 1110 100X for this example. IO0_0, IO0_2, IO0_3 configured as outputs. IO0_1, IO0_4, IO0_5 configured as inputs. IO0_6, IO0_7 and (IO1_0 to IO1_7) configured as inputs. Fig 16. Typical application PCA9539 IO0_0 IO0_1 SCL SDA VDD (5 V) MASTER CONTROLLER SCL SDA INT IO0_2 VDD A1 A0 VDD VSS INT 10 k Ω SUB-SYSTEM 1 (e.g., temp sensor) IO0_3 INT SUB-SYSTEM 2 (e.g., counter) RESET controlled switch (e.g., CBT device) VDD A B enable SUB-SYSTEM 3 (e.g., alarm system) ALARM IO0_4 IO0_5 IO0_6 10 DIGIT NUMERIC KEYPAD VSS 002aad730 10 k Ω 10 k Ω 2 k Ω 100 k Ω ( ×3) IO0_7 IO1_0 IO1_1 IO1_2 IO1_3 IO1_4 IO1_5 IO1_6 IO1_7 RESET RESET 10 k Ω |
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