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PCA9632DP2 Datasheet(PDF) 15 Page - NXP Semiconductors

Part # PCA9632DP2
Description  4-bit Fm I2C-bus low power LED driver
PDF  38 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9632DP2 Datasheet(HTML) 15 Page - NXP Semiconductors

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PCA9632_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 15 July 2008
15 of 38
NXP Semiconductors
PCA9632
4-bit Fm+ I2C-bus low power LED driver
Once subaddresses have been programmed to their right values, SUBx bits need to be
set to 1 in order to have the device acknowledging these addresses (MODE1 register).
Only the 7 MSBs representing the I2C-bus subaddress are valid. The LSB in SUBADRx
register is a read-only bit (0).
When SUBx is set to 1, the corresponding I2C-bus subaddress can be used during either
an I2C-bus read or write sequence.
7.3.8 LED All Call I2C-bus address, ALLCALLADR
The LED All Call I2C-bus address allows all the PCA9632s in the bus to be programmed
at the same time (ALLCALL bit in register MODE1 must be equal to 1, power-up default
state). This address is programmable through the I2C-bus and can be used during either
an I2C-bus read or write sequence. The register address can be programmed as a
sub call.
Only the 7 MSBs representing the All Call I2C-bus address are valid. The LSB in
ALLCALLADR register is a read-only bit (0).
If ALLCALL bit = 0, the device does not acknowledge the address programmed in register
ALLCALLADR.
7.4 Power-on reset
When power is applied to VDD, an internal power-on reset holds the PCA9632 in a reset
condition until VDD has reached VPOR. At this point, the reset condition is released and the
PCA9632 registers and I2C-bus state machine are initialized to their default states (all
zeroes) causing all the channels to be deselected. Thereafter, VDD must be lowered below
0.2 V to reset the device.
7.5 Software reset
The Software Reset Call (SWRST Call) allows all the devices in the I2C-bus to be reset to
the power-up state value through a specific formatted I2C-bus command. To be performed
correctly, it implies that the I2C-bus is functional and that there is no device hanging the
bus.
The SWRST Call function is defined as the following:
1. A START command is sent by the I2C-bus master.
2. The reserved SWRST I2C-bus address ‘0000 011’ with the R/W bit set to 0 (write) is
sent by the I2C-bus master.
3. The PCA9632 device(s) acknowledge(s) after seeing the SWRST Call address
‘0000 0110’ (06h) only. If the R/W bit is set to 1 (read), no acknowledge is returned to
the I2C-bus master.
Table 13.
ALLCALLADR - LED All Call I2C-bus address register (address 0Ch) bit
description
Legend: * default value.
Address
Register
Bit
Symbol
Access
Value
Description
0Ch
ALLCALLADR
7:1
AC[7:1]
R/W
1110 000*
ALLCALL I2C-bus
address register
0
AC[0]
R only
0*
reserved



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