TDA9983B datasheet(8/119 Pages) NXP

8 / 119 page

TDA9983B_1

Product data sheet

Rev. 01 — 20 May 2008

8 of 119

NXP Semiconductors

TDA9983B

150 MHz pixel rate HDMI transmitter

[1]

P = power supply; G = ground; I = input; O = output.

Functional description

The TDA9983B is designed to convert digital data (video and audio) into an HDMI or a

DVI stream. This HDMI stream can handle RGB, YCBCR 4:4:4 and YCBCR 4:2:2. The

TDA9983B can accept at its inputs any of the following video modes:

• RGB

• YCBCR 4:4:4

• YCBCR 4 : 2 : 2 semi-planar

• YCBCR 4 : 2 : 2 ITU656 and ITU656-like

It can also handle audio. The TDA9983B can accept at its inputs any of the following audio

buses:

• I2S-bus (4 lines): up to 8 audio channels

• S/PDIF (1 channel): L-PCM (IEC 60958) or compressed audio (IEC 61937)

8.1 System clock

The clock management is based on a set of 3 PLLs that generate the different clocks

required inside the chip. This includes:

• PLL double edge can generate a clock at twice the VCLK input frequency to capture

the data at the video input formatter

• PLL scaling can create a new video processing scaled clock taking into account the

scaling ratio programmed in the scaler

• PLL serializer is a system clock generator, which enables the stream produced by the

encoder to be transmitted on the HDMI data channel at ten times the sampling rate or

more; see Section 8.14.2

8.2 Video input processor

The TDA9983B has three video input ports VPA[7:0], VPB[7:0] and VPC[7:0]. The

TDA9983B can reallocate and swap each of the 3 ports input channels by inverting the

bus and swapping each port.

The TDA9983B can be set to latch data at either the rising or falling edge or both.

The video input formats accept (see Table 5):

• RGB

• YCBCR 4 : 4 : 4 (up to 3 × 8-bit)

• YCBCR 4 : 2 : 2 semi-planar (up to 2 × 12-bit)

• YCBCR 4 : 2 : 2 compliant with ITU656 and ITU656-like (up to 1 × 12-bit)

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