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LTC3859 Datasheet(PDF) 14 Page - Linear Technology |
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LTC3859 Datasheet(HTML) 14 Page - Linear Technology |
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14 / 40 page ![]() LTC3859 14 3859f OPERATION Main Control Loop The LTC3859 uses a constant frequency, current mode step-down architecture. The two buck controllers, chan- nels 1 and 2, operate 180 degrees out of phase with each other. The boost controller, channel 3, operates in phase with channel 1. During normal operation, the external top MOSFET for the buck channels (the external bottom MOSFET for the boost channel) is turned on when the clock for that channel sets the RS latch, and is turned off when the main current comparator, ICMP, resets the RS latch. The peak inductor current at which ICMP trips and resets the latch is controlled by the voltage on the ITH pin, which is the output of the error amplifier EA. The error amplifier compares the output voltage feedback signal at the VFB pin, (which is generated with an external resistor divider connected across the output voltage, VOUT, to ground) to the internal 0.800V reference voltage for the bucks (1.2V reference voltage for the boost). When the load current increases, it causes a slight decrease in VFB relative to the reference, which causes the EA to increase the ITH voltage until the average inductor current matches the new load current. After the top MOSFET for the bucks (the bottom MOSFET for the boost) is turned off each cycle, the bottom MOSFET is turned on (the top MOSFET for the boost) until either the inductor current starts to reverse, as indicated by the current comparator IR, or the beginning of the next clock cycle. INTVCC/EXTVCC Power Power for the top and bottom MOSFET drivers and most other internal circuitry is derived from the INTVCC pin. When the EXTVCC pin is left open or tied to a voltage less than 4.7V, the VBIAS LDO (low dropout linear regulator) supplies 5.4V from VBIAS to INTVCC. If EXTVCC is taken above 4.7V, the VBIAS LDO is turned off and an EXTVCC LDO is turned on. Once enabled, the EXTVCC LDO supplies 5.4V from EXTVCC to INTVCC. Using the EXTVCC pin allows the INTVCC power to be derived from a high efficiency external source such as one of the LTC3859 switching regulator outputs. Each top MOSFET driver is biased from the floating boot- strap capacitor CB, which normally recharges during each cycle through an external diode when the switch voltage goes low. For buck channels 1 and 2, if the buck’s input voltage decreases to a voltage close to its output, the loop may enter dropout and attempt to turn on the top MOSFET continuously. The dropout detector detects this and forces the top MOSFET off for about one twelfth of the clock period every tenth cycle to allow CB to recharge. Shutdown and Start-Up (RUN1, RUN2, RUN3 and TRACK/SS1, TRACK/SS2, SS3 Pins) The three channels of the LTC3859 can be independently shut down using the RUN1, RUN2 and RUN3 pins. Pull- ing any of these pins below 1.2V shuts down the main control loop for that channel. Pulling all three pins below 0.7V disables all controllers and most internal circuits, including the INTVCC LDOs. In this state, the LTC3859 draws only 14μA of quiescent current. Releasing a RUN pin allows a small internal current to pull up the pin to enable that controller. The RUN1 pin has a 6μA pull-up current while the RUN2 and RUN3 pins have a smaller 0.5μA. The 6μA current on RUN1 is designed to be large enough so that the RUN1 pin can be safely floated (to always enable the controller) without worry of condensation or other small board leakage pulling the pin down. This is ideal for always-on applications where one or more controllers are enabled continuously and never shut down. Each RUN pin may also be externally pulled up or driven directly by logic. When driving a RUN pin with a low im- pedance source, do not exceed the absolute maximum rating of 8V. Each RUN pin has an internal 11V voltage clamp that allows the RUN pin to be connected through a resistor to a higher voltage (for example, VBIAS), so long as the maximum current in the RUN pin does not exceed 100μA. The start-up of each channel’s output voltage VOUT is con- trolled by the voltage on the TRACK/SS pin (TRACK/SS1 for channel 1, TRACK/SS2 for channel 2, SS3 for channel 3). When the voltage on the TRACK/SS pin is less than the (Refer to Functional Diagram) |
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