B3

B1

7

6

5

4

3

2

1

14

13

11

10

12

OUT4

OUT3

OUT5

36

34

22

24

25

30

31

32

33

35

15

16

19

20

21

23

B2

NC

NC

8

9

17

18

26

27

29

28

GND

OUT6

GND

IN3

IN4

IN6

IN5

GND

NC

GND

TX810

PowerPAD™

TX810

www.ti.com

SLLS996A – SEPTEMBER 2009 – REVISED APRIL 2010

DEVICE INFORMATION

PIN FUNCTIONS

PIN

DESCRIPTION

NUMBER

NAME

1, 3, 7, 9, 10, 12, 34,

INn

Inputs for Channel n

36

16, 18, 19, 21, 25, 27,

OUTn

Outputs for Channel n

28, 30

33

VD

Logic Supply Voltage; +2.5 V to +5 V; bypass to ground with 0.1 µF and 10 µF capacitors

31

VP

Positive Supply Voltage; +5 V; bypass to ground with 0.1 µF and 10 µF capacitors

15

VN

Negative Supply Voltage; –5 V; bypass to ground with 0.1 µF and 10 µF capacitors

13

VB

Bias voltage; connect to 0 V (GND) for ±5 V operation

2, 8, 11, 14, 17, 20, 26,

GND

Ground

29, 32, 35

24

B1

Bit 1; Current program bit

23

B2

Bit 2; Current program bit

22

B3

Bit 3; Current program bit

4, 5, 6

NC

No internal connection.

PowerPAD™ of the package. –5 V to 0 V for ±5 V operation. The thermal pad is needed for thermal

0

Vsub

dissipation.

PQFN (RHH) Package

6 × 6mm, 0.5mm Pitch

(Top View)

Copyright © 2009–2010, Texas Instruments Incorporated

Submit Documentation Feedback

3

Product Folder Link(s) :TX810