THS7360 datasheet(7/43 Pages) TI

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THS7360

www.ti.com

SLOS674 – JUNE 2010

ELECTRICAL CHARACTERISTICS: VS+ = +3.3 V (continued)

At TA = +25°C, RL = 150 Ω to GND, Filter mode, and dc-coupled input/output, unless otherwise noted.

THS7360

TEST

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

LEVEL(1)

POWER SUPPLY

Operating voltage

2.6

3.3

5.5

VIN = 0 V, all channels on

18.8

24.5

29.5

VIN = 0 V, SD channels on, SF channels off

5.6

7.1

Total quiescent current, no load

VIN = 0 V, SD channels off, SF channels on

13.2

17.4

20.5

VIN = 0 V, all channels off, VDISABLE = 3 V

0.1

Power-supply rejection ratio

At dc

(PSRR)

LOGIC CHARACTERISTICS

VIH

Disabled or Bypass engaged

1.6

1.4

VIL

Enabled or Bypass disengaged

0.75

0.6

IIH

Applied voltage = 3.3 V

IIL

Applied voltage = 0 V

Disable time

150

Enable time

150

Bypass/filter switch time

Table 1. TRUTH TABLE: VS+ = +3.3 V

(1)

FILTER 1

FILTER 2

BYPASS SF

DESCRIPTION

Selects the standard definition filter (9.2 MHz) for the SF channels

Selects the enhanced definition filter (17 MHz) for the SF channels

Selects the high-definition filter (35 MHz) for the SF channels

Selects the full/true high-definition filter (70 MHz) for the SF channels

Bypasses the filters for the SF channels

(1)

The logic input pins default to a logic '0' condition when left floating.

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