THS7360 datasheet(27/43 Pages) TI

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THS7360

www.ti.com

SLOS674 – JUNE 2010

The THS7360 allowable input range is approximately

and the input capacitor size. Lastly, the input

0 V to (VS+ – 1.5 V), allowing for a very wide input

capacitor forms a high-pass filter with the parallel

voltage range. As such, the input dc bias point is very

impedance of the pull-up resistor and the 800-k

Ω

flexible, with the output dc bias point being the

resistor. In general, it is good to have this high-pass

primary factor. For example, if the output dc bias

filter at approximately 3 Hz to minimize any potential

point on a SD channel is desired to be 1.6 V on a

droop on a P’B or P’R signal. A 0.1-mF input capacitor

3.3-V supply, then the input dc bias point should be

with

9.31-M

Ω

pull-up

resistor

equates

(1.6 V – 120 mV)/5.6 = 0.264 V. Thus, the pull-up

approximately a 2.2-Hz high-pass corner frequency.

resistor

calculates

approximately

9.31

Ω,

This mode of operation is recommended for use with

resulting in 0.261 V. If the output dc-bias point is

chroma (C’), P’B, P’R, U’, and V’ signals. This method

desired to be 1.6 V with a 5-V power supply, then the

can also be used with sync signals if desired. The

pull-up resistor calculates to approximately 14.3 M

Ω.

benefit of using the STC function over the ac-bias

Keep in mind that the internal 800-k

Ω resistor has

configuration on embedded sync signals is that the

approximately

±20%

variance.

such,

the

STC maintains a constant back-porch voltage as

calculations should take this variance into account.

opposed to a back-porch voltage that fluctuates

For the 0.261-V example above, using an ideal

depending

the

video

content.

Because

the

9.31-M

Ω resistor, the input dc bias voltage is

high-pass corner frequency is a very low 2.2 Hz, the

approximately 0.261 V ± 0.05 V.

impact on the video signal is negligible relative to the

STC configuration.

The value of the output bias voltage is very flexible

and is left to each individual design. It is important to

ensure that the signal does not clip or saturate the

OUTPUT MODE OF OPERATION:

video signal. Thus, it is recommended to ensure the

DC-COUPLED

output bias voltage is between 0.9 V and (VS+ – 1 V).

The THS7360 incorporates a rail-to-rail output stage

For 100% color saturated CVBS or signals with

that can be used to drive the line directly without the

Macrovision®, the CVBS signal can reach up to

need for large ac-coupling capacitors. This design

1.23 VPP at the input, or 2.46 VPP at the output of the

offers

the

best

line

tilt

and

field

tilt

(droop)

THS7360. In contrast, other signals are typically

performance because no ac-coupling occurs. Keep in

1 VPP or 0.7 VPP at the input, which translate to an

mind that if the input is ac-coupled, then the resulting

output voltage of 2 VPP or 1.4 VPP, respectively. The

tilt as a result of the input ac-coupling continues to be

output bias voltage must account for a worst-case

seen on the output, regardless of the output coupling.

situation, depending on the signals involved.

The 80-mA output current drive capability of the

One other issue that must be taken into account is

THS7360 is designed to drive two video lines

the dc-bias point is a function of the power supply. As

simultaneously—essentially,

75-

Ω

load—while

such, there is an impact on system PSRR. To help

keeping the output dynamic range as wide as

reduce this impact, the input capacitor combines with

possible. Figure 47 shows the THS7360 driving two

the pull-up resistance to function as a low-pass filter.

video lines while keeping the output dc-coupled.

Additionally, the time to charge the capacitor to the

final dc bias point is a function of the pull-up resistor

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