TMS320DM6467 datasheet(49/357 Pages) TI

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3.7.10 Host-Port Interface (HPI)

TMS320DM6467

Digital Media System-on-Chip

www.ti.com

SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009

Table 3-14. HPI Terminal Functions

SIGNAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

NAME

NO.

Host-Port Interface (HPI)

HPI is enabled by the PINMUX0.HPIEN =1 (and PCIEN = 0 and ATAEN dependent for 16-/32-bit modes). For more detailed information on

the HPI pin muxing, see Section 4.7.3.1, PCI, HPI, EMIFA, and ATA Pin Muxing.

PCI_PERR/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

HCS/

I/O/Z

DVDD33

In HPI mode, this pin is the HPI active-low chip select input, HCS (I).

EM_DQM1

PCI_STOP/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

HCNTL0/

I/O/Z

DVDD33

In HPI mode, this pin is the HPI control input 0, HCNTL0 (I)

EM_WE

PCI_DEVSEL/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

HCNTL1/

I/O/Z

DVDD33

In HPI mode, this pin is the HPI control input 1, HCNTL1 (I).

EM_BA[1]

This pin is multiplexed between PCI, HPI, and EMIFA.

PCI_PAR/HAS/

IPU

In HPI mode, this pin is the HPI address strobe, HAS (I).

I/O/Z

EM_DQM0

DVDD33

NOTE: The DM6467 HPI does not support the HAS feature. For proper HPI

operation if the pin is routed out, it must be pulled up via an external resistor.

PCI_SERR/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

I/O/Z

HDS1/EM_OE

DVDD33

In HPI mode, this pin is the HPI data strobe input 1, HDS1 (I).

PCI_CBE2/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

I/O/Z

HDS2/EM_CS2

DVDD33

In HPI mode, this pin is the HPI data strobe input 2, HDS2 (I).

PCI_CBE3/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

I/O/Z

HR/W/EM_CS3

DVDD33

In HPI mode, this pin is the HPI host read/write select input, HR/W (I).

PCI_TRDY/

IPU

This pin is multiplexed between PCI, HPI, and EMIFA.

HHWIL/

I/O/Z

DVDD33

In HPI mode, this pin is the HPI half-word identification input control, HHWIL (I).

EM_A[16]/(ALE)

PCI_AD31/

DD15/

HD31/EM_A[15]

PCI_AD30/

DD14/

HD30/EM_A[14]

PCI_AD29/

DD13/

HD29/EM_A[13]

PCI_AD28/

DD12/

These pins are multiplexed between PCI, ATA, HPI, and EMIFA.

HD28/EM_A[12]

IPD

I/O/Z

In HPI-32 mode, these pins are the HPI upper data bus, HD[31:16] (I/O/Z).

DVDD33

PCI_AD27/

In HPI-16 mode, the HD[31:16] pins are not used by the HPI .

DD11/

HD27/EM_A[11]

PCI_AD26/

DD10/

HD26/ EM_A[10]

PCI_AD25/

DD9/

HD25/EM_A[9]

PCI_AD24/

DD8/

HD24/EM_A[8]

(1)

IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external

pullup/pulldown resistors are required, see Section 4.8.1, Pullup/Pulldown Resistors.

(2)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(3)

Specifies the operating I/O supply voltage for each signal

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