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AM1707BZKB4 Datasheet(PDF) 65 Page - Texas Instruments

Part # AM1707BZKB4
Description  ARM Microprocessor
PDF  199 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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AM1707BZKB4 Datasheet(HTML) 65 Page - Texas Instruments

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AM1707
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SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-18. EMIFA Supported SDRAM Configurations(1)
SDRAM
Memory
Memory
Number of
EMIFB Data
Total Memory
Total Memory
Data Bus
Rows
Columns
Banks
Density
Memories
Bus Size
(Mbits)
(Mbytes)
Width
(Mbits)
(bits)
1
16
13
8
1
32
4
32
1
16
13
8
2
64
8
64
1
16
13
8
4
128
16
128
1
16
13
9
1
64
8
64
1
16
13
9
2
128
16
128
1
16
13
9
4
256
32
256
16
1
16
13
10
1
128
16
128
1
16
13
10
2
256
32
256
1
16
13
10
4
512
64
512
1
16
13
11
1
256
32
256
1
16
13
11
2
512
64
512
1
16
13
11
4
1024
128
1024
2
16
13
8
1
32
4
16
2
16
13
8
2
64
8
32
2
16
13
8
4
128
16
64
2
16
13
9
1
64
8
32
2
16
13
9
2
128
16
64
2
16
13
9
4
256
32
128
8
2
16
13
10
1
128
16
64
2
16
13
10
2
256
32
128
2
16
13
10
4
512
64
256
2
16
13
11
1
256
32
128
2
16
13
11
2
512
64
256
2
16
13
11
4
1024
128
512
(1)
The shaded cells indicate configurations that are possible on the EMIFA interface but as of this writing SDRAM memories capable of
supporting these densities are not available in the market.
6.11.3 EMIFA SDRAM Loading Limitations
EMIFA supports SDRAM up to 100 MHz with up to two SDRAM or asynchronous memory loads.
Additional loads will limit the SDRAM operation to lower speeds and the maximum speed should be
confirmed by board simulation using IBIS models.
6.11.4 EMIFA Connection Examples
Figure 6-12 illustrates an example of how SDRAM, NOR, and NAND flash devices might be connected to
EMIFA of the device simultaneously. The SDRAM chip select must be EMA_CS[0]. Note that the NOR
flash is connected to EMA_CS[2] and the NAND flash is connected to EMA_CS[3] in this example. Note
that any type of asynchronous memory may be connected to EMA_CS[5:2].
The on-chip bootloader makes some assumptions on which chip select the contains the boot image, and
this depends on the boot mode. For NOR boot mode; the on-chip bootloader requires that the image be
stored in NOR flash on EMA_CS[2]. For NAND boot mode, the bootloader requires that the boot image is
stored in NAND flash on EMA_CS[3]. It is always possible to have the image span multiple chip selects,
but this must be supported by second stage boot code stored in the external flash.
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
65
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Product Folder Link(s): AM1707



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