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AM1707BZKB4 Datasheet(PDF) 75 Page - Texas Instruments |
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AM1707BZKB4 Datasheet(HTML) 75 Page - Texas Instruments |
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75 / 199 page  EMB_CS EMB_CAS EMB_RAS EMB_WE EMB_CLK EMB_SDCKE EMB_BA[1:0] EMB_A[x:0] EMB_D[x:0] EMB_WE_DQM[x:0] SDRAM Interface Cmd/Write FIFO Registers Read FIFO Crossbar EMIFB Master Peripherals (USB,UHPI...) EDMA CPU AM1707 www.ti.com SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010 6.12 External Memory Interface B (EMIFB) The following EMIFB Functional Block Diagram illustrates a high-level view of the EMIFB and its connections within the device. Multiple requesters have access to EMIFB through a switched central resource (indicated as crossbar in the figure). The EMIFB implements a split transaction internal bus, allowing concurrence between reads and writes from the various requesters. Figure 6-20. EMIFB Functional Block Diagram EMIFB supports a 3.3V LVCMOS Interface. Copyright © 2010, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 75 Submit Documentation Feedback Product Folder Link(s): AM1707 |
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