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4-249
RF2451
Rev A8 000822
4
Pin
Function
Description
Interface Schematic
1RF OUT
RF output pin. Bias for the LNA is provided through this pin, hence it
should be connected to VCC through an inductor.
2
ISET
This pin sets the current for the device. A resistor to ground of 1k
Ω pro-
vides a current of 17.5mA. The condition for optimal IP3 is to use the
internal current setting option and leave this pin open (no connect).
3VCC
Power supply for the bias circuits.
4
ENABLE
Power down control. This is a CMOS input. When this pin is CMOS
“high” the device is enabled. When the level is CMOS “low” the device
is shut off and a controlled attenuator is turned on.
5
IPSET
This pin selects the internal current setting when CMOS level “low”, and
the external current setting when this pin is CMOS level “high”. The cur-
rent is set to 2.8mA using the internal current setting, and can be up to
20mA using the external current setting.
6GND2
Ground connection for the bias circuits.
7GND1
Ground connection for the LNA. Keep traces physically short and con-
nect immediately to ground plane for best performance.
8RF IN
RF input pin. This pin is not internally DC blocked and requires an
external blocking capacitor.