Electronic Components Datasheet Search
  English  ▼

X  

RF2690 Datasheet(PDF) 5 Page - RF Micro Devices

Part # RF2690
Description  W-CDMA RECEIVE AGC AND DEMODULATOR
PDF  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RFMD [RF Micro Devices]
Direct Link  http://www.rfmd.com
Logo RFMD - RF Micro Devices

RF2690 Datasheet(HTML) 5 Page - RF Micro Devices

  RF2690 Datasheet HTML 1Page - RF Micro Devices RF2690 Datasheet HTML 2Page - RF Micro Devices RF2690 Datasheet HTML 3Page - RF Micro Devices RF2690 Datasheet HTML 4Page - RF Micro Devices RF2690 Datasheet HTML 5Page - RF Micro Devices RF2690 Datasheet HTML 6Page - RF Micro Devices RF2690 Datasheet HTML 7Page - RF Micro Devices RF2690 Datasheet HTML 8Page - RF Micro Devices RF2690 Datasheet HTML 9Page - RF Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 16 page
background image
Preliminary
7-43
RF2690
Rev A4 010918
7
Pin
Function
Description
Interface Schematic
1VGC1
Analog gain control. Valid control voltage ranges are from 0.5V to 2.5V.
These voltages are valid with a 10k
Ω resistor in series with GC pin.
2NC
Unused. Connect to signal ground in application.
3NC
Unused. Connect to signal ground in application.
4W-CDMA
IN+
W-CDMA balanced input pin. This pin is internally DC-biased and
should be DC-blocked if connected to a device with a DC level present.
For single-ended input operation, one pin is used as an input and the
other W-CDMA input is AC coupled to ground. The balanced input
impedance is 2.4k
Ω, while the single-ended input impedance is 1.2kΩ.
5W-CDMA
IN-
Same as pin 4, except complementary input.
See pin 4.
6VCC
Supply
7GND
Connect to ground.
8LO
LO input pin. This input is internally DC-biased and should be DC-
blocked if connected to a device with DC present. The frequency of the
signal applied to this pin is internally divided by a factor of four, hence
the LO applied should be four times the frequency of the IF.
9EN WUP
Warm-up mode enable. The input LO buffers and divider chains are
enabled. When logic “low” (<0.5V), chip is in warm-up mode. When
logic “high” (VCC -0.3V), chip is in W-CDMA RX mode.
10
EN RX
Chip enable. Power down. When logic “low” (< 0.5V), all circuits are
turned off. When logic “high” (VCC -0.3V), all circuits are operating.
11
Q OUT-
Complementary output to Q OUT+.
12
Q OUT+
Balanced baseband output of Q mixer. This pin is internally DC-biased
and should be DC-blocked externally. The output may be used single-
ended by leaving one of the pins unconnected, however half of the out-
put voltage will be lost.
13
I OUT-
Complementary output to I OUT+.
14
I OUT+
Balanced baseband output.
15
ENCAL
Calibration enable.
16
FCLK
FCLK clock reference for the automatic calibration circuitry.
17
IF-
Complementary output to IF+.
18
IF+
IF test point output. This balanced node is pinned out to allow for moni-
toring of the AGC output signal as it enters the demodulator. During
normal operation, this pin and its complementary output should be left
floating and not connected.
1200
1200
W-CDMA IN+
BIAS
BIAS
W-CDMA IN-
150
µA
QOUT-
QOUT+
V
CC
V
CC
150
µA
150
µA
IOUT-
IOUT+
150
µA
V
CC
V
CC
20 k



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com