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sames

PM9607AP

IN CIRCUIT EEPROM CONFIGURATION

The EEPROM remains on the PCB and is reprogrammed via

the IIC bus.

Figure 6: Schematic diagram of the IIC opto-isolator module as well as relevant components on the PM9607AP module

O2

4N35

O3

4N35

SCL

DIRO

VDD

R2

470R

SDA

VSS

R3

470R

VSS

FOUT

R4

2.2k

TEST

VDD

VSS

R5

680R

R6

220R

R7

680R

R10

220R

R8

680R

R9

680R

PC VSS

SDI

FIN

SDO

T2

SCK

T1

1

2

15

16

O1A

ILQ74

4

3

14

13

O1B

ILQ74

5

6

11

12

O1C

ILQ74

8

7

10

9

O1D

ILQ74

R1

4.7k

R11

10k

Q1

BC327

VSS

VDD

U1

CNF

U1

SCL

U1

DIRO

U1

SDA

U1

LED

Pin 2

Pin 3

Pin 9

Pin 4

Pin 13

Pin 12

Pin 18..25

Pin 7..8

R21

R22

820R

U3

SCL

VDD

U3

SDA

On PM9607AP module

DR-01579

On Interface module

PC Printer Port

DIRO

CNF

DR-01578

ISOLATED PC INTERFACE MODULE

OPERATION

The isolator module connects to a standard PC printer port by

means of an extender cable on the one side and to the

PM9607AP on the other side. The PC is completely isolated

form the evaluation module and can be used to program the

EEPROM on the PM9607AP module safely.

The SA9607P is designed to be the bus master and does not

support multi master mode. Resistor R22 is used to overdrive

the clock signal of the SA9607P during programming.

Table 5: Pin description of the CAL connector

Figure 5: Wave forms describing the configuration trigger

No

1

2

3

4

5

6

7

Function

Positive supply

A positive edge on CNF with DIRO high will

trigger a configuration reload

Serial data pin

Serial clock pin

LED pin of device

DIRO need to be high before CNF is pulsed

to trigger a reload

Negative supply voltage

Name

VDD

CNF

SDA

SCK

FOUT

DIRO

VSS

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