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THS7364IPW Datasheet(PDF) 29 Page - Texas Instruments |
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THS7364IPW Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 47 page ![]() Level Shift Internal Circuitry +V S 800kW Input Pin THS7364 www.ti.com SBOS530 – AUGUST 2010 R’G’B’ (commonly mislabeled RGB) is also called Other AGC circuits use the chroma burst amplitude G’B’R’ (again commonly mislabeled as GBR) in for amplitude control; reduction in the sync signals professional video systems. The Society of Motion does not alter the proper gain setting. However, it is Picture and Television Engineers (SMPTE) good engineering design practice to ensure that component standard stipulates that the luma saturation/clipping does not take place. Transistors information is placed on the first channel, the blue always take a finite amount of time to come out of color difference is placed on the second channel, and saturation. This saturation could possibly result in the red color difference signal is placed on the third timing delays or other aberrations on the signals. channel. This practice is consistent with the Y'/P'B/P'R To eliminate saturation or clipping problems, the nomenclature. Because the luma channel (Y') carries THS7364 has a 150-mV input level shift feature. This the sync information and the green channel (G') also feature takes the input voltage and adds an internal carries the sync information, it makes logical sense +150-mV shift to the signal. Because the THS7364 that G' be placed first in the system. Because the also has a gain of 6 dB (2 V/V), the resulting output blue color difference channel (P'B) is next and the red with a 0-V applied input signal is approximately 300 color difference channel (P'R) is last, then it also mV. The THS7364 rail-to-rail output stage can create makes logical sense to place the B' signal on the this output level while connected to a typical video second channel and the R' signal on the third load. This configuration ensures that no saturation or channel, respectfully. Thus, hardware compatibility is clipping of the sync signals occur. This shift is better achieved when using G'B'R' rather than R'G'B'. constant, regardless of the input signal. For example, Note that for many G'B'R' systems, sync is embedded if a 1-V input is applied, the output is 2.3 V. on all three channels, but this configuration may not always be the case in all systems. Because the internal gain is fixed at +6 dB, the gain dictates what the allowable linear input voltage range INPUT MODE OF OPERATION: DC can be without clipping concerns. For example, if the power supply is set to 3 V, the maximum output is The inputs to the THS7364 allow for both ac- and approximately 2.9 V while driving a significant amount dc-coupled inputs. Many DACs or video encoders can of current. Thus, to avoid clipping, the allowable input be dc-connected to the THS7364. One of the is ([2.9 V/2] – 0.15 V) = 1.3 V. This range is valid for drawbacks to dc-coupling arises when 0 V is applied up to the maximum recommended 5-V power supply to the input. Although the input of the THS7364 that allows approximately a ([4.9 V/2] – 0.15 V) = 2.3 allows for a 0-V input signal without issue, the output V input range while avoiding clipping on the output. swing of a traditional amplifier cannot yield a 0-V signal, resulting in possible clipping. This limitation is The input impedance of the THS7364 in this mode of true for any single-supply amplifier because of the operation is dictated by the internal, 800-k Ω characteristics of the output transistors. Neither pull-down resistor, as shown in Figure 78. Note that CMOS nor bipolar transistors can achieve 0 V while the internal voltage shift does not appear at the input sinking current. This transistor characteristic is also pin; it only shows at the output pin. the same reason why the highest output voltage is always less than the power-supply voltage when sourcing current. This output clipping can reduce the sync amplitudes (both horizontal and vertical sync) on the video signal. A problem occurs if the video signal receiver uses an automatic gain control (AGC) loop to account for losses in the transmission line. Some video AGC circuits derive gain from the horizontal sync amplitude. If clipping occurs on the sync amplitude, then the AGC circuit can increase the gain too much—resulting in too much luma and/or chroma amplitude gain correction. This correction may result in a picture with an overly bright display with too Figure 78. Equivalent DC Input Mode Circuit much color saturation. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Link(s): THS7364 |
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