LTC2463 datasheet(14/20 Pages) LINER

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LTC2461/LTC2463

24613f

APPLICATIONS INFORMATION

PRESERVING THE CONVERTER ACCURACY

The LTC2461/LTC2463 are designed to minimize the conver-

sion result’s sensitivity to device decoupling, PCB layout,

antialiasing circuits, line and frequency perturbations. Nev-

ertheless, in order to preserve the high accuracy capability

of this part, some simple precautions are desirable.

Digital Signal Levels

Due to the nature of CMOS logic, it is advisable to keep

input digital signals near GND or VCC. Voltages in the range

of 0.5V to VCC – 0.5V may result in additional current

leakage from the part. Undershoot and overshoot should

also be minimized, particularly while the chip is convert-

ing. Excessive noise on the digital lines could degrade the

ADC performance.

Driving VCC and GND

In relation to the VCC and GND pins, the LTC2461/LTC2463

combines internal high frequency decoupling with damping

elements, which reduce the ADC performance sensitivity

to PCB layout and external components. Nevertheless,

the very high accuracy of this converter is best pre-

served by careful low and high frequency power supply

decoupling.

A 0.1μF, high quality, ceramic capacitor in parallel with

a 10μF low ESR ceramic capacitor should be connected

between the VCC and GND pins, as close as possible to

the package. The 0.1μF capacitor should be placed closest

to the ADC package. It is also desirable to avoid any via

in the circuit path, starting from the converter VCC pin,

passing through these two decoupling capacitors, and

returning to the converter GND pin. The area encompassed

by this circuit path, as well as the path length, should be

minimized.

As shown in Figure 8, REF– is used as the negative refer-

ence voltage input to the ADC. This pin can be tied directly

to ground or Kelvined to sensor ground. In the case where

REF– is used as a sense input, it should be bypassed to

ground with a 0.1μF ceramic capacitor in parallel with a

10μF low ESR ceramic capacitor.

Very low impedance ground and power planes, and star

connections at both VCC and GND pins, are preferable.

The VCC pin should have two distinct connections: the

ﬁrst to the decoupling capacitors described above, and

the second to the ground return for the power supply

voltage source.

REFOUT and COMP

The on-chip 1.25V precision reference is internally tied

to the LTC2461/LTC2463 converter’s reference input and

its output to the REFOUT pin. A 0.1μF capacitor should

be placed on the REFOUT pin. It is possible to reduce

this capacitor, but the transition noise increases. A 0.1μF

capacitor should also be placed on the COMP pin. This

pin is tied to an internal point in the reference and is used

for stability. In order for the reference to remain stable the

capacitor placed on the COMP pin must be greater than or

Figure 8. LTC2461/LTC2463 Analog Input/Reference

Equivalent Circuit

RSW

15k

(TYP)

ILEAK

VCC

CEQ

0.35pF

(TYP)

IN+

IN–

REF–

REFOUT

INTERNAL

REFERENCE

24613 F08

RSW

15k

(TYP)

ILEAK

RSW

15k

(TYP)

ILEAK

RSW

15k

(TYP)

ILEAK

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