INA282 datasheet(3/31 Pages) TI

3 / 31 page

INA282, INA283

INA284, INA285

INA286

www.ti.com

SBOS485A – NOVEMBER 2009 – REVISED JULY 2010

ELECTRICAL CHARACTERISTICS

Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.

At TA = +25°C, V+ = 5V, V+IN = 12V, VREF1 = VREF2 = 2.048V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise

noted.

INA282, INA283,

INA284, INA285, INA286

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

INPUT

Offset Voltage, RTI(1)

VOS

VSENSE = 0mV

±20

±70

vs Temperature

dVOS/dT

±0.3

±1.5

mV/°C

vs Power Supply

PSRR

VS = +2.7V to +18V, VSENSE = 0mV

mV/V

Common-Mode Input Range

VCM

–14

Common-Mode Rejection

CMRR

V+IN = –14V to +80V, VSENSE = 0mV

120

140

Input Bias Current per Pin(2)

VSENSE = 0mV

Input Offset Current

IOS

VSENSE = 0mV

Differential Input Impedance

Ω

REFERENCE INPUTS

Reference Input Gain

V/V

Reference Input Voltage Range(3)

VGND + 9

Divider Accuracy(4)

±0.2

±0.5

Reference Voltage Rejection Ratio

VREF1 = VREF2 = 40mV to 9V, V+ = 18V

INA282

±25

±75

mV/V

vs Temperature

0.055

mV/V/°C

INA283

±13

±30

mV/V

vs Temperature

0.040

mV/V/°C

INA284

±6

±25

mV/V

vs Temperature

0.015

mV/V/°C

INA285

±4

±10

mV/V

vs Temperature

0.010

mV/V/°C

INA286

±17

±45

mV/V

vs Temperature

0.040

mV/V/°C

GND + 0.5V

≤ VOUT ≤ (V+) – 0.5V;

GAIN(5)

VREF1 = VREF2 = (V+)/2 for all devices

Gain

INA282

V+ = +5V

V/V

INA283

V+ = +5V

200

V/V

INA284

V+ = +12V

500

V/V

INA285

V+ = +12V

1000

V/V

INA286

V+ = +5V

100

V/V

Gain Error

INA282, INA283, INA286

±0.4

±1.4

INA284, INA285

±0.4

±1.5

vs Temperature

0.0008

0.005

%/°C

OUTPUT

Nonlinearity Error

±0.01

Output Impedance

1.5

Ω

Maximum Capacitive Load

No sustained oscillation

(1)

RTI = referred-to-input.

(2)

See typical characteristic graph Figure 20 .

(3)

The average of the voltage on pins REF1 and REF2 must be between VGND and the lesser of (VGND+9V) and V+.

(4)

Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 37.

(5)

See typical characteristic graph Figure 25.

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