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DS3151 Datasheet(PDF) 61 Page - Maxim Integrated Products

Part # DS3151
Description  Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
PDF  61 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS3151 Datasheet(HTML) 61 Page - Maxim Integrated Products

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DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
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Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
M a x i m In tegra t ed P r oduc ts , 1 2 0 S a n Ga brie l D r iv e , Sun ny vale , CA 94 086 40 8 - 7 3 7 - 76 00
© 2007 Maxim Integrated Products
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.
17.
REVISION HISTORY
REVISION
DESCRIPTION
012103
DS3154 new product release
040403
DS3151/DS3152/DS3153 new product releases.
Electrical Characteristics section, Notes 1 and 2: Changed 44.73MHz to 51.84MHz; added indication that
specs are lower for rev A2; “all ones driven into RXPn/RXNn (1.0V square wave)” changed to “analog
loopback enabled” to match production test methodology.
Table 13-B, Input leakage, IIL: -10μA min changed to -50μA min.
Table 13-B: Replaced TBD values for IDD, IDDTS, and IDDPD (DS3151/DS3152/DS3153); changed IDDPD
spec from 38 typ and 50 max to 45 typ and 70 max.
Table 14-A and Table 14-B: Changed pins RBIN, RCINV, TBIN, and TCINV to “N.C.” to reflect they are
not available in CPU bus mode.
072303
Figure 1-1: Labeled capacitors connected to transformer center taps as “(optional)”.
Section 6, Optional Pre-Amp Paragraph: Clarified that the pre-amp contributes +14dB of flat gain.
Table 11-A: Changed leakage inductance to 0.150
μH max.
Table 11-B: Reformatted table and added row for Pulse Engineering’s T3049 octal transformer.
Table 13-H: Reworded Note 20.
120303
GCR Register Definition (page 16): Clarified that the RST bit holds the digital logic of the LIU in reset
rather than the whole LIU.
Table 13-B: Changed DS3151 IDD from 130mA (max) to 100mA (max). Changed DS3151 IDDTTS from
105mA (max) to 80mA (max). Removed sentences in Notes 1 and 2 that labeled the IDD and IDDTTS specs
for rev A1 devices.
052404
Added typical IDD and IDDTTS numbers to Table 13-B.
110404
Table 13-D and Table 13-E: Changed ALOS set and clear thresholds to typical numbers.
Figure 13-4: Added second note to the Read Cycle timing diagrams.
062705
Page 18: RCINV bit description: Changed 0 = rising edge to falling edge; changed 1 = falling edge to
rising edge.
030607
Page 39: In Table 13-D and Table 13-E, changed the TYP receiver input characteristics to show
increased sensitivity:
Analog LOS Declare, RMON = 0 from -23 to -24
Analog LOS Clear, RMON = 0 from -20 to -21
Analog LOS Declare, RMON = 1 from -37 to -38
Analog LOS Clear, RMON = 1 from -34 to -35



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