MAX6301ESA datasheet(7/12 Pages) MAXIM

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watchdog counter. When WDI is left unconnected, the

watchdog timer is cleared by this internal driver just

before the timeout period is reached (the internal driver

pulls WDI high at about 94% of tWD). When WDI is

three-stated, the maximum allowable leakage current of

the device driving WDI is 10µA.

In normal mode (WDS = GND), the watchdog timer

cannot be disabled by three-stating WDI. WDI is a

high-impedance input in this mode. Do not leave WDI

unconnected in normal mode.

Applications Information

Selecting the Reset and Watchdog

Timeout Capacitor

The reset timeout period is adjustable to accommodate

a variety of µP applications. Adjust the reset timeout

period (tRP) by connecting a specific value capacitor

(CSRT) between SRT and ground (Figure 3). Calculate

the reset timeout capacitor as follows:

CSRT = tRP/2.67

+5V, Low-Power µP Supervisory Circuits

with Adjustable Reset/Watchdog

_______________________________________________________________________________________

VCC

WDI

RESET

NORMAL MODE (WDS = GND)

tWD

tRP

VCC

WDI

RESET

EXTENDED MODE (WDS = VCC)

tWD x 500

tRP

Figure 2a. Watchdog Timing Diagram, WDS = GND

Figure 2b. Watchdog Timing Diagram, WDS = VCC

0.1

µF

MAX6301

MAX6302

MAX6303

MAX6304

VCC

GND

CSRT =

tRP

2.67

VCC

CSWT

CSRT

CSRT in pF

tRP in

µs

CSWT =

tWD

2.67

CSWT in pF

tWD in

µs

SRT

SWT

Figure 3. Calculating the Reset (CSRT) and Watchdog (CSWT)

Timeout Capacitor Values

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