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82575 Datasheet(PDF) 57 Page - Intel Corporation |
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82575 Datasheet(HTML) 57 Page - Intel Corporation |
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57 / 69 page ![]() 51 82575 Gigabit Ethernet Controller Datasheet 1. Clock is 2MHz 2. 50% duty cycle Figure 3. EEPROM Interface Time Diagram 7.4.2 FLASH Interface Applicable over recommended operating range from Ta = -40C to +85C, VCC3P3 = 3.3 V, Cload = 1 TTL Gate and 16 pF (unless otherwise noted) tSCK SCK clock frequency 0 2 2.1 MHz [1] tRI Input rise time 2.5ns 2 us tFI Input fall time 2.5ns 2 us tWH SCK high time 200 250 ns [2] tWL SCK low time 200 250 ns tCS CS high time 250 ns tCSS CS setup time 250 ns tCSH CS hold time 250 ns tSU Data-in setup time 50 ns tH Data-in hold time 50 ns tV Output valid 0 200 ns tHO Output hold time 0 ns tDIS Output disable time 250 ns CS SCK SI SO VIH VIL VIH VIL VIH VIL VIH VIL tCSS tCSH tCS tWH tWL tSU tH tV tHO tDIO Hi-Z Hi-Z VALID IN |
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