L9951TR datasheet(7/36 Pages) STMICROELECTRONICS

7 / 36 page

L9951 / L9951XP

Block diagram and pin description

Doc ID 14173 Rev 8

7/36

Table 2.

Pin definitions and functions

Symbol

Function

1, 18, 19,

GND

Ground

Reference potential.

Note: For the capability of driving the full current at the outputs all pins of

GND must be externally connected.

6, 7, 14,

15, 23, 24,

29, 32

Power supply voltage (external reverse protection required).

For EMI reason a ceramic capacitor as close as possible to GND is

recommended.

Note: for the capability of driving the full current at the outputs all pins of

VS must be externally connected.

3, 4, 34

OUT1

Half-bridge output 1.

The output is built by a high side and a low side switch, which are

internally connected. The output stage of both switches is a power

DMOS transistor. Each driver has an internal reverse diode (bulk-drain-

diode: high side driver from output to VS, low side driver from GND to

output). This output is over-current and open-load protected.

Note: for the capability of driving the full current at the outputs all pins of

OUT1 must be externally connected.

8DI

Serial data input.

The input requires CMOS logic levels and receives serial data from the

microcontroller. The data is a 16bit control word and the least significant

bit (LSB, bit 0) is transferred first.

9CM/PWM

Current monitor output/PWM input.

Depending on the selected multiplexer bits (bit 9, 10, 11) of Input Data

corresponding high side driver with a ratio of 1/10.000. This pin is

bidirectional. The microcontroller can overwrite the current monitor signal

to provide a PWM input for all outputs.

Testmode:

If CSN is raised above 7.5V the device will enter the test mode. In test

mode this output can be used to measure some internal signals (see

Table 18).

CSN

Chip select not input / Testmode

This input is low active and requires CMOS logic levels. The serial data

transfer between L9951 and micro controller is enabled by pulling the

input CSN to low level. If an input voltage of more than 7.5V is applied to

CSN pin the L9951 will be switched into a test mode.

Serial data output .

The diagnosis data is available via the SPI and this tristate-output. The

output will remain in tristate, if the chip is not selected by the input CSN

(CSN = high).

VCC

Logic supply voltage .

For this input a ceramic capacitor as close as possible to GND is

recommended.

CLK

Serial clock input .

This input controls the internal shift register of the SPI and requires

CMOS logic levels.

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