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L9951TR Datasheet(PDF) 8 Page - STMicroelectronics |
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L9951TR Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 36 page ![]() Block diagram and pin description L9951 / L9951XP 8/36 Doc ID 14173 Rev 8 Figure 2. Configuration diagram (top view) 16, 17 OUT2 Half-bridge output 2 (see OUT1 - pin 3, 4). Note : for the capability of driving the full current at the outputs all pins of OUT2 must be externally connected. 20, 21 OUT3 Half-bridge output 3 (see OUT1 - pin 3, 4). Note: for the capability of driving the full current at the outputs all pins of OUT3 must be externally connected. 26 CP Charge Pump Output . This output is provided to drive the gate of an external n-channel power MOS used for reverse polarity protection (see Figure 1). 27 EN Enable input. If Enable input is forced to GND the device will enter Standby-Mode. The outputs will be switched off and all registers will be cleared 33, 35 OUT4, OUT5 High side driver output 4, 5 . The output is built by a high side switch and is intended for resistive loads, hence the internal reverse diode from GND to the output is missing. For ESD reason a diode to GND is present but the energy which can be dissipated is limited. The high side driver is a power DMOS transistor with an internal reverse diode from the output to VS (bulk- drain-diode). The output is over-current and open-load protected. Table 2. Pin definitions and functions (continued) Pin Symbol Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 Chip Leadframe GND N.C. OUT1 OUT1 N.C. VS VS CSN DO VCC CLK VS VS OUT2 OUT2 GND DI GND OUT5 OUT1 OUT4 VS N.C. N.C. N.C. EN CP N.C. VS VS N.C. OUT3 OUT3 GND VS . CM/PWM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 Chip Leadframe GND N.C. OUT1 OUT1 N.C. VS VS CSN DO VCC CLK VS VS OUT2 OUT2 GND DI GND OUT5 OUT1 OUT4 VS N.C. N.C. N.C. EN CP N.C. VS VS N.C. OUT3 OUT3 GND VS . CM/PWM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 Chip Leadframe GND N.C. OUT1 OUT1 N.C. VS VS CSN DO VCC CLK VS VS OUT2 OUT2 GND DI GND OUT5 OUT1 OUT4 VS N.C. N.C. N.C. EN CP N.C. VS VS N.C. OUT3 OUT3 GND VS . CM/PWM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 Chip Leadframe GND N.C. OUT1 OUT1 N.C. VS VS CSN DO VCC CLK VS VS OUT2 OUT2 GND DI GND OUT5 OUT1 OUT4 VS N.C. N.C. N.C. EN CP N.C. VS VS N.C. OUT3 OUT3 GND VS. CM/PWM |
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